mirror of
https://github.com/rdolbeau/VexRiscvBPluginGenerator.git
synced 2025-04-18 18:44:42 -04:00
83 lines
1.7 KiB
C
83 lines
1.7 KiB
C
/*
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cpucycles/riscv.c version 20190803
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D. J. Bernstein
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Romain Dolbeau
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Public domain.
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*/
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#include <time.h>
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#include <sys/time.h>
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#include <sys/types.h>
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long long cpucycles_riscv(void)
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{
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long long result;
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#if defined(__riscv_xlen)
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#if __riscv_xlen == 64
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asm volatile("rdcycle %0" : "=r" (result));
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#elif __riscv_xlen == 32
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unsigned int l, h, h2;
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asm volatile( "start:\n"
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"rdcycleh %0\n"
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"rdcycle %1\n"
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"rdcycleh %2\n"
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"bne %0, %2, start\n"
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: "=r" (h), "=r" (l), "=r" (h2));
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result = (((unsigned long long)h)<<32) | ((unsigned long long)l);
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#else
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#error "unknown __riscv_xlen"
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#endif
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#else // __riscv_xlen
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#error "__riscv_xlen required for RISC-V support"
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#endif // __riscv_xlen
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return result;
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}
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static long long microseconds(void)
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{
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struct timeval t;
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gettimeofday(&t,(struct timezone *) 0);
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return t.tv_sec * (long long) 1000000 + t.tv_usec;
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}
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static double guessfreq(void)
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{
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long long tb0; long long us0;
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long long tb1; long long us1;
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tb0 = cpucycles_riscv();
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us0 = microseconds();
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do {
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tb1 = cpucycles_riscv();
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us1 = microseconds();
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} while (us1 - us0 < 10000 || tb1 - tb0 < 1000);
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if (tb1 <= tb0) return 0;
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tb1 -= tb0;
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us1 -= us0;
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return ((double) tb1) / (0.000001 * (double) us1);
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}
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static long long cpufrequency = 0;
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static void init(void)
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{
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double guess1;
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double guess2;
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int loop;
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for (loop = 0;loop < 100;++loop) {
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guess1 = guessfreq();
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guess2 = guessfreq();
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if (guess1 > 1.01 * guess2) continue;
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if (guess2 > 1.01 * guess1) continue;
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cpufrequency = 0.5 * (guess1 + guess2);
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break;
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}
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}
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long long cpucycles_riscv_persecond(void)
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{
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if (!cpufrequency) init();
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return cpufrequency;
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}
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