linting changes

Signed-off-by: Eric Matthews <ematthew@sfu.ca>
This commit is contained in:
Eric Matthews 2022-03-24 21:09:33 -04:00
parent 2ea13a9234
commit 1f0a43e5f1
7 changed files with 20 additions and 20 deletions

View file

@ -154,7 +154,7 @@ package csr_types;
} mie_t;
typedef struct packed {
logic interrupt;
logic is_interrupt;
logic [XLEN-1-1-ECODE_W:0] zeroes;
logic [ECODE_W-1:0] code;
} mcause_t;

View file

@ -491,11 +491,11 @@ generate if (CONFIG.INCLUDE_M_MODE) begin : gen_csr_m_mode
always_ff @(posedge clk) begin
mcause.zeroes <= '0;
if (rst) begin
mcause.interrupt <= 0;
mcause.is_interrupt <= 0;
mcause.code <= 0;
end
else if (CONFIG.CSRS.NON_STANDARD_OPTIONS.INCLUDE_MCAUSE & ((mcause_write_valid & mwrite_en(MCAUSE)) | exception.valid | interrupt_taken)) begin
mcause.interrupt <= interrupt_taken | (mwrite_en(MCAUSE) & updated_csr[XLEN-1]);
mcause.is_interrupt <= interrupt_taken | (mwrite_en(MCAUSE) & updated_csr[XLEN-1]);
mcause.code <= interrupt_taken ? interrupt_cause_r : exception.valid ? exception.code : updated_csr[ECODE_W-1:0];
end
end

View file

@ -200,7 +200,7 @@ module l2_arbiter
.lr (reserv_lr),
.sc (reserv_sc),
.store (reserv_store),
.abort(mem.abort)
.abort_request(mem.abort_request)
);
//sc response
@ -211,7 +211,7 @@ module l2_arbiter
request[i].con_valid <= 0;
end
else begin
request[i].con_result <= ~mem.abort;
request[i].con_result <= ~mem.abort_request;
request[i].con_valid <= reserv_sc & reserv_valid & reserv_id_v[i];
end
end
@ -239,11 +239,11 @@ module l2_arbiter
*************************************/
assign new_attr.id = reserv_id;
assign new_attr.burst_size = reserv_request.amo_type_or_burst_size;
assign new_attr.abort = mem.abort;
assign new_attr.abort_request = mem.abort_request;
assign data_attributes.data_in = new_attr;
assign data_attributes.push = reserv_valid & ~reserv_request.rnw & ~mem.abort;
assign data_attributes.potential_push = reserv_valid & ~reserv_request.rnw & ~mem.abort;
assign data_attributes.push = reserv_valid & ~reserv_request.rnw & ~mem.abort_request;
assign data_attributes.potential_push = reserv_valid & ~reserv_request.rnw & ~mem.abort_request;
cva5_fifo #(.DATA_WIDTH($bits(l2_data_attributes_t)), .FIFO_DEPTH(L2_DATA_ATTRIBUTES_FIFO_DEPTH)) data_attributes_fifo (.*, .fifo(data_attributes));
@ -263,8 +263,8 @@ module l2_arbiter
cva5_fifo #(.DATA_WIDTH($bits(32)), .FIFO_DEPTH(L2_MEM_ADDR_FIFO_DEPTH)) mem_data (.*, .fifo(mem_data_fifo));
assign mem_data_fifo.push = data_attributes.valid & ~mem_data_fifo.full & ~current_attr.abort;
assign mem_data_fifo.potential_push = data_attributes.valid & ~mem_data_fifo.full & ~current_attr.abort;
assign mem_data_fifo.push = data_attributes.valid & ~mem_data_fifo.full & ~current_attr.abort_request;
assign mem_data_fifo.potential_push = data_attributes.valid & ~mem_data_fifo.full & ~current_attr.abort_request;
assign mem_data_fifo.data_in = input_data[current_attr.id];

View file

@ -68,7 +68,7 @@ package l2_config_and_types;
typedef struct packed{
logic [$clog2(L2_NUM_PORTS)-1:0] id;
logic [4:0] burst_size;
logic abort;
logic abort_request;
} l2_data_attributes_t;

View file

@ -90,7 +90,7 @@ interface l2_memory_interface;
logic request_pop;
logic request_valid;
logic abort;
logic abort_request;
logic [31:0] wr_data;
logic wr_data_valid;
@ -101,18 +101,18 @@ interface l2_memory_interface;
logic rd_data_valid;
modport master (output addr, be, rnw, is_amo, amo_type_or_burst_size, id,
output request_valid, abort, input request_pop,
output request_valid, abort_request, input request_pop,
output wr_data, wr_data_valid, input wr_data_read,
input rd_data, rd_id, rd_data_valid);
modport slave (input addr, be, rnw, is_amo, amo_type_or_burst_size, id,
input request_valid, abort, output request_pop,
input request_valid, abort_request, output request_pop,
input wr_data, wr_data_valid, output wr_data_read,
output rd_data, rd_id, rd_data_valid);
`ifdef __CVA5_FORMAL__
modport formal (input addr, be, rnw, is_amo, amo_type_or_burst_size, id,
request_valid, abort, output request_pop,
request_valid, abort_request, output request_pop,
wr_data, wr_data_valid, output wr_data_read,
rd_data, rd_id, rd_data_valid);
`endif

View file

@ -37,7 +37,7 @@ module l2_reservation_logic
input logic sc,
input logic store, //includes read-modify-write AMOs
output logic abort
output logic abort_request
);
@ -72,7 +72,7 @@ module l2_reservation_logic
reservation_address[id] <= addr;
end
assign abort = sc && (~reservation[id] || (reservation[id] && ~address_match[id]));
assign abort_request = sc && (~reservation[id] || (reservation[id] && ~address_match[id]));
endmodule

View file

@ -795,9 +795,9 @@
<obj_property name="ElementShortName">request_valid</obj_property>
<obj_property name="ObjectShortName">request_valid</obj_property>
</wvobject>
<wvobject type="logic" fp_name="/cva5_tb/l2_arb/mem/abort">
<obj_property name="ElementShortName">abort</obj_property>
<obj_property name="ObjectShortName">abort</obj_property>
<wvobject type="logic" fp_name="/cva5_tb/l2_arb/mem/abort_request">
<obj_property name="ElementShortName">abort_request</obj_property>
<obj_property name="ObjectShortName">abort_request</obj_property>
</wvobject>
<wvobject type="array" fp_name="/cva5_tb/l2_arb/mem/wr_data">
<obj_property name="ElementShortName">wr_data[31:0]</obj_property>