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Move write-back group config into cpu_config struct

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Signed-off-by: Eric Matthews <ematthew@sfu.ca>
This commit is contained in:
Eric Matthews 2023-04-29 18:37:42 -04:00
parent 1d0ac14e70
commit 31ecd190d6
6 changed files with 70 additions and 43 deletions
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43
core/cva5.sv
View file

@ -51,14 +51,6 @@ module cva5
input interrupt_t m_interrupt
);
////////////////////////////////////////////////////
//WB Assignment
localparam unit_id_enum_t WB_GROUP1 [1] = '{ALU_ID};
localparam unit_id_enum_t WB_GROUP2 [1] = '{LS_ID};
localparam unit_id_enum_t WB_GROUP3 [4] = '{MUL_ID, DIV_ID, CSR_ID, CUSTOM_ID};
unit_writeback_interface unit_wb [MAX_NUM_UNITS]();
////////////////////////////////////////////////////
//Connecting Signals
l1_arbiter_request_interface l1_request[L1_CONNECTIONS-1:0]();
@ -129,6 +121,7 @@ module cva5
logic retire_port_valid [RETIRE_PORTS];
logic [LOG2_RETIRE_PORTS : 0] retire_count;
//Writeback
unit_writeback_interface unit_wb [MAX_NUM_UNITS]();
wb_packet_t wb_packet [CONFIG.NUM_WB_GROUPS];
phys_addr_t wb_phys_addr [CONFIG.NUM_WB_GROUPS];
//Exception
@ -590,42 +583,20 @@ module cva5
////////////////////////////////////////////////////
//Writeback
writeback #(
.CONFIG (CONFIG),
.NUM_WB_UNITS ($size(WB_GROUP1)),
.WB_INDEX (WB_GROUP1)
)
writeback_block1 (
.clk (clk),
.rst (rst),
.wb_packet (wb_packet[0]),
.unit_wb (unit_wb)
);
writeback #(
.CONFIG (CONFIG),
.NUM_WB_UNITS ($size(WB_GROUP2)),
.WB_INDEX (WB_GROUP2)
)
writeback_block2 (
.clk (clk),
.rst (rst),
.wb_packet (wb_packet[1]),
.unit_wb (unit_wb)
);
generate if ($size(WB_GROUP3) > 0) begin : gen_wb3
generate for (genvar i = 0; i < CONFIG.NUM_WB_GROUPS; i++) begin : gen_wb
writeback #(
.CONFIG (CONFIG),
.NUM_WB_UNITS ($size(WB_GROUP3)),
.WB_INDEX (WB_GROUP3)
.NUM_WB_UNITS (get_num_wb_units(CONFIG.WB_GROUP[i])),
.WB_INDEX (CONFIG.WB_GROUP[i])
)
writeback_block3 (
writeback_block (
.clk (clk),
.rst (rst),
.wb_packet (wb_packet[2]),
.wb_packet (wb_packet[i]),
.unit_wb (unit_wb)
);
end endgenerate
////////////////////////////////////////////////////
//End of Implementation
////////////////////////////////////////////////////

28
core/types_and_interfaces/cva5_config.sv
View file

@ -106,7 +106,7 @@ package cva5_config;
// - units_t
// - unit_id_enum_t
//ensuring that the bit index in units_t matches the enum value in unit_id_enum_t
//Additionally, writeback units must be grouped before non-writeback units
localparam MAX_NUM_UNITS = 8;
typedef struct packed {
bit IEC;
@ -120,6 +120,7 @@ package cva5_config;
bit ALU;
} units_t;
typedef enum bit [$clog2(MAX_NUM_UNITS)-1:0] {
IEC_ID = 7,
BR_ID = 6,
@ -131,6 +132,9 @@ package cva5_config;
LS_ID = 1,
ALU_ID = 0
} unit_id_enum_t;
localparam unit_id_enum_t NON_WRITEBACK_ID = BR_ID;
typedef unit_id_enum_t [MAX_NUM_UNITS-1:0][MAX_NUM_UNITS-1:0] wb_group_config_t;
typedef struct packed {
//ISA options
@ -175,6 +179,7 @@ package cva5_config;
branch_predictor_config_t BP;
//Writeback Options
int unsigned NUM_WB_GROUPS;
wb_group_config_t WB_GROUP;
} cpu_config_t;
//Function to generate derived cache parameters
@ -188,6 +193,24 @@ package cva5_config;
endfunction
//WB config
//ALU requires its own WB port
//LS unit must be the first unit on its writeback port (LS unit does not use ack signal for timing considerations)
localparam wb_group_config_t EXAMPLE_WB_GROUP_CONFIG = '{
0 : '{0: ALU_ID, default : NON_WRITEBACK_ID},
1 : '{0: LS_ID, default : NON_WRITEBACK_ID},
2 : '{0: MUL_ID, 1: DIV_ID, 2: CSR_ID, 3: CUSTOM_ID, default : NON_WRITEBACK_ID},
default : '{default : NON_WRITEBACK_ID}
};
//Convenience function for determining how many writeback units are in each writeback group
function int unsigned get_num_wb_units (input unit_id_enum_t [MAX_NUM_UNITS-1:0] ids);
get_num_wb_units = 0;
for (int i = 0; i < MAX_NUM_UNITS; i++)
if (ids[i] != NON_WRITEBACK_ID)
get_num_wb_units++;
endfunction
localparam cpu_config_t EXAMPLE_CONFIG = '{
//ISA options
INCLUDE_M_MODE : 1,
@ -296,7 +319,8 @@ package cva5_config;
RAS_ENTRIES : 8
},
//Writeback Options
NUM_WB_GROUPS : 3
NUM_WB_GROUPS : 3,
WB_GROUP : EXAMPLE_WB_GROUP_CONFIG
};

2
core/writeback.sv
View file

@ -29,7 +29,7 @@ module writeback
# (
parameter cpu_config_t CONFIG = EXAMPLE_CONFIG,
parameter int unsigned NUM_WB_UNITS = 5,
parameter unit_id_enum_t WB_INDEX [NUM_WB_UNITS] = '{ALU_ID, MUL_ID, DIV_ID, LS_ID, CSR_ID}
parameter unit_id_enum_t [MAX_NUM_UNITS-1:0] WB_INDEX = '{0: ALU_ID, 1: MUL_ID, 2: DIV_ID, 3: LS_ID, 4: CSR_ID, default: NON_WRITEBACK_ID}
)
(

20
examples/litex/litex_wrapper.sv
View file

@ -74,6 +74,13 @@ module litex_wrapper
input logic idbus_err
);
localparam wb_group_config_t MINIMAL_WB_GROUP_CONFIG = '{
0 : '{0: ALU_ID, default : NON_WRITEBACK_ID},
1 : '{0: LS_ID, 1: CSR_ID, default : NON_WRITEBACK_ID},
default : '{default : NON_WRITEBACK_ID}
};
localparam cpu_config_t MINIMAL_CONFIG = '{
//ISA options
INCLUDE_M_MODE : 1,
@ -179,7 +186,15 @@ module litex_wrapper
RAS_ENTRIES : 8
},
//Writeback Options
NUM_WB_GROUPS : 2
NUM_WB_GROUPS : 2,
WB_GROUP : MINIMAL_WB_GROUP_CONFIG
};
localparam wb_group_config_t STANDARD_WB_GROUP_CONFIG = '{
0 : '{0: ALU_ID, default : NON_WRITEBACK_ID},
1 : '{0: LS_ID, default : NON_WRITEBACK_ID},
2 : '{0: MUL_ID, 1: DIV_ID, 2: CSR_ID, 3: CUSTOM_ID, default : NON_WRITEBACK_ID},
default : '{default : NON_WRITEBACK_ID}
};
localparam cpu_config_t STANDARD_CONFIG = '{
@ -287,7 +302,8 @@ module litex_wrapper
RAS_ENTRIES : 8
},
//Writeback Options
NUM_WB_GROUPS : 3
NUM_WB_GROUPS : 3,
WB_GROUP : STANDARD_WB_GROUP_CONFIG
};
function cpu_config_t config_select (input integer variant);

10
examples/nexys/nexys_sim.sv
View file

@ -101,6 +101,13 @@ module cva5_sim
output logic store_queue_empty
);
localparam wb_group_config_t NEXYS_WB_GROUP_CONFIG = '{
0 : '{0: ALU_ID, default : NON_WRITEBACK_ID},
1 : '{0: LS_ID, default : NON_WRITEBACK_ID},
2 : '{0: MUL_ID, 1: DIV_ID, 2: CSR_ID, 3: CUSTOM_ID, default : NON_WRITEBACK_ID},
default : '{default : NON_WRITEBACK_ID}
};
localparam cpu_config_t NEXYS_CONFIG = '{
//ISA options
INCLUDE_M_MODE : 1,
@ -206,7 +213,8 @@ module cva5_sim
RAS_ENTRIES : 8
},
//Writeback Options
NUM_WB_GROUPS : 3
NUM_WB_GROUPS : 3,
WB_GROUP : NEXYS_WB_GROUP_CONFIG
};
parameter SCRATCH_MEM_KB = 128;

10
examples/nexys/nexys_wrapper.sv
View file

@ -75,6 +75,13 @@ module nexys_wrapper
input logic [5:0] m_axi_bid
);
localparam wb_group_config_t NEXYS_WB_GROUP_CONFIG = '{
0 : '{0: ALU_ID, default : NON_WRITEBACK_ID},
1 : '{0: LS_ID, default : NON_WRITEBACK_ID},
2 : '{0: MUL_ID, 1: DIV_ID, 2: CSR_ID, 3: CUSTOM_ID, default : NON_WRITEBACK_ID},
default : '{default : NON_WRITEBACK_ID}
};
localparam cpu_config_t NEXYS_CONFIG = '{
//ISA options
INCLUDE_M_MODE : 1,
@ -180,7 +187,8 @@ module nexys_wrapper
RAS_ENTRIES : 8
},
//Writeback Options
NUM_WB_GROUPS : 3
NUM_WB_GROUPS : 3,
WB_GROUP : NEXYS_WB_GROUP_CONFIG
};
//Unused outputs