github-mirrors/cva5
1
0
Fork 0
mirror of https://github.com/openhwgroup/cva5.git synced 2025-04-20 12:07:53 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

further packaging fixes

Browse source
This commit is contained in:
Eric Matthews 2019-09-08 10:55:56 -07:00
parent fb61f981fa
commit 8cfcca5080
3 changed files with 10 additions and 8 deletions
Download patch file Download diff file Expand all files Collapse all files

4
core/l1_arbiter.sv
View file

@ -34,8 +34,8 @@ module l1_arbiter
output sc_complete,
output sc_success,
l1_arbiter_request_interface.arb l1_request[L1_CONNECTIONS-1:0],
l1_arbiter_return_interface.arb l1_response[L1_CONNECTIONS-1:0]
l1_arbiter_request_interface.slave l1_request[L1_CONNECTIONS-1:0],
l1_arbiter_return_interface.slave l1_response[L1_CONNECTIONS-1:0]
);
l2_request_t[L1_CONNECTIONS-1:0] l2_requests;

12
l2_arbiter/l2_external_interfaces.sv
View file

@ -50,13 +50,15 @@ interface l2_requester_interface;
logic rd_data_valid;
logic rd_data_ack;
modport master (output request, request_push, input request_full,
modport master (output addr, be, rnw, is_amo, amo_type_or_burst_size, sub_id,
output request_push, input request_full,
input inv_addr, inv_valid, output inv_ack,
input con_result, con_valid,
output wr_data, wr_data_push, input data_full,
input rd_data, rd_sub_id, rd_data_valid, output rd_data_ack);
modport slave (input request, request_push, output request_full,
modport slave (input addr, be, rnw, is_amo, amo_type_or_burst_size, sub_id,
input request_push, output request_full,
output inv_addr, inv_valid, input inv_ack,
output con_result, con_valid,
input wr_data, wr_data_push, output data_full,
@ -85,13 +87,13 @@ interface l2_memory_interface #( parameter L2_ID_W = $clog2(L2_NUM_PORTS) + L2_S
logic [L2_ID_W-1:0] rd_id;
logic rd_data_valid;
modport master (output request_addr, request_be, request_rnw, request_is_amo, request_amo_type_or_burst_size, request_id,
modport master (output addr, be, rnw, is_amo, amo_type_or_burst_size, id,
output request_valid, abort, input request_pop,
output wr_data, wr_data_valid, input wr_data_read,
input rd_data, rd_id, rd_data_valid);
modport slave (input request_addr, request_be, request_rnw, request_is_amo, request_amo_type_or_burst_size, request_id,
input request, request_valid, abort, output request_pop,
modport slave (input addr, be, rnw, is_amo, amo_type_or_burst_size, id,
input request_valid, abort, output request_pop,
input wr_data, wr_data_valid, output wr_data_read,
output rd_data, rd_id, rd_data_valid);
endinterface

2
tools/taiga_compile_order
View file

@ -2,7 +2,7 @@
../core/taiga_types.sv
../l2_arbiter/l2_config_and_types.sv
../l2_arbiter/l2_interfaces.sv
../l2_arbiter/l2_external_interfaces.sv
../local_memory/local_memory_interface.sv
../local_memory/local_mem.sv