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aesks1i added
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parent
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4 changed files with 11 additions and 19 deletions
16
core/alu.sv
16
core/alu.sv
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@ -69,11 +69,7 @@ module alu
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logic [ 63:0] aes64ds_gen;
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logic [ 63:0] aes64dsm_gen;
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logic [ 63:0] aes64im_gen;
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// logic [ 31:0] tmp1;
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// logic [ 31:0] tmp2;
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// logic [ 31:0] tmp3;
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// logic [ 31:0] rc;
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// logic [ 63:0] aes64ks1i_gen;
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logic [ 63:0] aes64ks1i_gen;
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logic [ 63:0] aes64ks2_gen;
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// bit reverse operand_a for left shifts and bit counting
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generate
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@ -329,12 +325,8 @@ module alu
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assign aes64dsm_gen = {aes_mixcolumn_inv(aes64ds_gen[63:32]), aes_mixcolumn_inv(aes64ds_gen[31:0])};
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assign aes64im_gen = {aes_mixcolumn_inv(fu_data_i.operand_a[63:32]), aes_mixcolumn_inv(fu_data_i.operand_a[31:0])};
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// AES Key Schedule results
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assign aes64ks2_gen = {(fu_data_i.operand_a[63:32] ^ fu_data_i.operand_b[31:0] ^ fu_data_i.operand_b[63:32]), (fu_data_i.operand_a[63:32] ^ fu_data_i.operand_b[31:0])};
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// assign tmp1 = fu_data_i.operand_a[63:32];
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// assign rc = orig_instr_aes[3:0];
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// assign tmp2 = (orig_instr_aes[3:0] == 4'hA) ? fu_data_i.operand_a[63:32] : ((fu_data_i.operand_a[63:32] >> 8) | (fu_data_i.operand_a[63:32] << 24));
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// assign tmp3 = aes_subword_fwd(tmp2);
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// assign aes64ks1i_gen = (orig_instr_aes[3:0] <= 4'hA) ? {(tmp3 ^ rc), (tmp3 ^ rc)} : 64'h0;
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assign aes64ks2_gen = {(fu_data_i.operand_a[63:32] ^ fu_data_i.operand_b[31:0] ^ fu_data_i.operand_b[63:32]), (fu_data_i.operand_a[63:32] ^ fu_data_i.operand_b[31:0])};
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assign aes64ks1i_gen = (orig_instr_aes[3:0] <= 4'hA) ? {((aes_subword_fwd((orig_instr_aes[3:0] == 4'hA) ? fu_data_i.operand_a[63:32] : ((fu_data_i.operand_a[63:32] >> 8) | (fu_data_i.operand_a[63:32] << 24)))) ^ (aes_decode_rcon(orig_instr_aes[3:0]))), ((aes_subword_fwd((orig_instr_aes[3:0] == 4'hA) ? fu_data_i.operand_a[63:32] : ((fu_data_i.operand_a[63:32] >> 8) | (fu_data_i.operand_a[63:32] << 24)))) ^ (aes_decode_rcon(orig_instr_aes[3:0])))} : 64'h0;
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end
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end
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@ -460,7 +452,7 @@ module alu
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if (fu_data_i.operation == AES64DS && CVA6Cfg.IS_XLEN64) result_o = aes64ds_gen;
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if (fu_data_i.operation == AES64DSM && CVA6Cfg.IS_XLEN64) result_o = aes64dsm_gen;
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if (fu_data_i.operation == AES64IM && CVA6Cfg.IS_XLEN64) result_o = aes64im_gen;
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//if (fu_data_i.operation == AES64KS1I && CVA6Cfg.IS_XLEN64) result_o = aes64ks1i_gen;
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if (fu_data_i.operation == AES64KS1I && CVA6Cfg.IS_XLEN64) result_o = aes64ks1i_gen;
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if (fu_data_i.operation == AES64KS2 && CVA6Cfg.IS_XLEN64) result_o = aes64ks2_gen;
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end
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end
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@ -995,8 +995,8 @@ module decoder
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instruction_o.op = ariane_pkg::BSETI;
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else if (CVA6Cfg.ZKN && instr.instr[31:20] == 12'b000010001111)
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instruction_o.op = ariane_pkg::ZIP;
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// else if (CVA6Cfg.ZKN && instr.instr[31:24] == 8'b00110001)
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// instruction_o.op = ariane_pkg::AES64KS1I;
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else if (CVA6Cfg.ZKN && instr.instr[31:24] == 8'b00110001)
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instruction_o.op = ariane_pkg::AES64KS1I;
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else if (CVA6Cfg.ZKN && instr.instr[31:20] == 12'b001100000000)
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instruction_o.op = ariane_pkg::AES64IM;
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else illegal_instr_bm = 1'b1;
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@ -512,7 +512,7 @@ package ariane_pkg;
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AES64DSM,
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AES64IM,
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// AES Key-Schedule instructions
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//AES64KS1I,
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AES64KS1I,
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AES64KS2
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} fu_op;
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@ -1013,10 +1013,10 @@ testlist:
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<<: *common_test_config
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asm_tests: <path_var>/riscv-arch-test/riscv-test-suite/rv64i_m/K/src/aes64ks2-01.S
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# - test: rv64i_m-aes64ks1i-01
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# iterations: 1
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# <<: *common_test_config
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# asm_tests: <path_var>/riscv-arch-test/riscv-test-suite/rv64i_m/K/src/aes64ks1i-01.S
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- test: rv64i_m-aes64ks1i-01
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iterations: 1
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<<: *common_test_config
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asm_tests: <path_var>/riscv-arch-test/riscv-test-suite/rv64i_m/K/src/aes64ks1i-01.S
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- test: rv64i_m-aes64ds-01
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iterations: 1
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