mirror of
https://github.com/openhwgroup/cva6.git
synced 2025-04-24 06:07:19 -04:00
fix CI
This commit is contained in:
Côme Allart
parent
aa03f6a307
commit
10ea8240d2
3 changed files with 73 additions and 153 deletions
199
.gitlab-ci.yml
199
.gitlab-ci.yml
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@ -52,7 +52,6 @@ variables:
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GIT_STRATEGY: fetch
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GIT_SUBMODULE_STRATEGY: recursive
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TAGS_RUNNER: $TAGS_RUNNER
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SCOPE_CVV: "true"
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DASHBOARD: "cva6"
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WORKFLOW_EVENT: $CI_PIPELINE_SOURCE
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@ -60,18 +59,6 @@ variables:
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.template_job_low_footprint:
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variables:
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GIT_STRATEGY: none
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before_script:
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- echo 'nothing'
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after_script:
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- echo 'nothing'
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# macro: job launched only in case of CI triggered by core-v-verif repository (not included by cva6 CI)
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.template_job_init_cva6:
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tags: [$TAGS_RUNNER]
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rules:
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- if: '$SCOPE_CVV == "true"'
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when: on_success
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- when: never
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# macro: job always launched (if pipeline is created)
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.template_job_full_ci:
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@ -100,7 +87,6 @@ variables:
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allow_failure: true
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stages:
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- init env
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- build tools
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- smoke tests
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- verif tests
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@ -111,7 +97,7 @@ stages:
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.verif_test:
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stage: verif tests
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before_script:
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- !reference [before_script]
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- mkdir -p tools
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- mv artifacts/tools/spike tools
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- rm -rf artifacts/
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- mkdir -p artifacts/{reports,logs}
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@ -122,77 +108,20 @@ stages:
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paths:
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- artifacts/
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.initjob: &initjob
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job: pub_initjob
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optional: true
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.backend_test:
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stage: backend tests
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before_script:
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- !reference [before_script]
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- mkdir -p artifacts/{reports,logs}
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- python3 .gitlab-ci/scripts/report_fail.py
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artifacts: *artifacts
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# In the scope of a CI triggered by core-v-verif repository:
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# This job will get the HASH of the given CVA6 branch
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# This HASH will be used by the next jobs instead of the CVA6 given BRANCH name
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# This prevents CI to not use the same version of CVA6 in case of new commit in CVA6 branch during the execution of the CI
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pub_initjob:
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stage: init env
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extends:
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- .template_job_low_footprint
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- .template_job_init_cva6
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script:
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- '[[ -e ./cva6 ]] && rm -rf cva6'
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- git clone $CVA6_REPO -b $CVA6_BRANCH --depth=1 cva6
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- echo CVA6_HASH=$(git -C cva6 rev-parse origin/$CVA6_BRANCH) > .env
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artifacts:
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reports:
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dotenv: .env
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pub_check_env:
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stage: build tools
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extends:
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- .template_job_low_footprint
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- .template_job_full_ci
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script:
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- echo $CI_WEIGHT
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- echo $RISCV
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- echo $RISCV_PREFIX
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- echo $VERILATOR_ROOT
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- echo $VERILATOR_INSTALL_DIR
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- echo $SPIKE_ROOT
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- echo $SPIKE_INSTALL_DIR
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- echo $BBL_ROOT
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- echo $SYN_VCS_BASHRC
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- echo $SYN_DCSHELL_BASHRC
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- echo $QUESTA_BASHRC
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- echo $VIVADO_SETUP
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- echo $CVA6_REPO
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- echo $CVA6_BRANCH
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- echo $CVA6_HASH
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- echo $CORE_V_VERIF_REPO
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- echo $CORE_V_VERIF_BRANCH
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- echo $CORE_V_VERIF_HASH
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- echo $COMPLIANCE_REPO
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- echo $COMPLIANCE_BRANCH
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- echo $COMPLIANCE_HASH
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- echo $COMPLIANCE_PATCH
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- echo $TESTS_REPO
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- echo $TESTS_BRANCH
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- echo $TESTS_HASH
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- echo $DV_REPO
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- echo $DV_BRANCH
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- echo $DV_HASH
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- echo $DV_PATCH
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- echo $TAGS_RUNNER
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- echo $NUM_JOBS
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- echo $FOUNDRY_PATH
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- echo $NAND2_AREA
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- echo $TECH_NAME
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- echo $SYNTH_PERIOD
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- echo $LIB_VERILOG
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- env
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pub_build_tools:
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stage: build tools
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@ -209,7 +138,7 @@ pub_build_tools:
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# Set up Spike, whether locally built or pre-installed.
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# If initially set to "__local__", SPIKE_INSTALL_DIR will be resolved
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# to an absolute path by the installation script.
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- source cva6/regress/install-spike.sh
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- source verif/regress/install-spike.sh
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# Strip locally built binaries and libraries to reduce artifact size.
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- '[ -f $(pwd)/tools/spike/bin/spike ] && strip $(pwd)/tools/spike/bin/spike* $(pwd)/tools/spike/lib/lib*.*'
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- mkdir -p artifacts/tools/
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@ -234,12 +163,12 @@ pub_smoke:
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- !reference [.verif_test, before_script]
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script:
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# In order to capture logs in case of test failure, the test script cannot fail.
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- source cva6/regress/smoke-tests.sh || true
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- source verif/regress/smoke-tests.sh || true
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# The list of files must NOT fail on various DV_SIMULATORS values, so use 'v*_sim' to match
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# 'veri-testharness_sim', 'vcs-testharness_sim' and 'vcs-uvm_sim' (one of them always applies,
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# at least until new RTL simulator configurations are added.)
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- for i in cva6/sim/*/v*_sim/*.log.iss ; do head -10000 $i > artifacts/logs/$(basename $i).head ; done
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- python3 .gitlab-ci/scripts/report_simu.py cva6/sim/logfile.log
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- for i in verif/sim/*/v*_sim/*.log.iss ; do head -10000 $i > artifacts/logs/$(basename $i).head ; done
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- python3 .gitlab-ci/scripts/report_simu.py verif/sim/logfile.log
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artifacts: *artifacts
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pub_gen_smoke:
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@ -258,12 +187,12 @@ pub_gen_smoke:
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- !reference [.verif_test, before_script]
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script:
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# In order to capture logs in case of test failure, the test script cannot fail.
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- source cva6/regress/smoke-gen_tests.sh || true
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- source verif/regress/smoke-gen_tests.sh || true
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# The list of files must NOT fail on various DV_SIMULATORS values, so use 'v*_sim' to match
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# 'veri-testharness_sim', 'vcs-testharness_sim' and 'vcs-uvm_sim' (one of them always applies,
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# at least until new RTL simulator configurations are added.)
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- for i in cva6/sim/*/v*_sim/*.log.iss ; do head -10000 $i > artifacts/logs/$(basename $i).head ; done
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- python3 .gitlab-ci/scripts/report_simu.py cva6/sim/logfile.log
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- for i in verif/sim/*/v*_sim/*.log.iss ; do head -10000 $i > artifacts/logs/$(basename $i).head ; done
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- python3 .gitlab-ci/scripts/report_simu.py verif/sim/logfile.log
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artifacts: *artifacts
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pub_riscv_arch_test:
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@ -280,8 +209,8 @@ pub_riscv_arch_test:
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DASHBOARD_SORT_INDEX: 0
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DASHBOARD_JOB_CATEGORY: "Test suites"
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script:
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- source cva6/regress/dv-riscv-arch-test.sh
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- python3 .gitlab-ci/scripts/report_simu.py cva6/sim/logfile.log
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- source verif/regress/dv-riscv-arch-test.sh
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- python3 .gitlab-ci/scripts/report_simu.py verif/sim/logfile.log
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csr_test:
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extends:
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@ -297,8 +226,8 @@ csr_test:
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DASHBOARD_SORT_INDEX: 0
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DASHBOARD_JOB_CATEGORY: "Test suites"
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script:
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- source cva6/regress/dv-riscv-csr-access-test.sh
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- python3 .gitlab-ci/scripts/report_simu.py cva6/sim/logfile.log
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- source verif/regress/dv-riscv-csr-access-test.sh
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- python3 .gitlab-ci/scripts/report_simu.py verif/sim/logfile.log
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pub_hwconfig:
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extends:
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@ -315,7 +244,7 @@ pub_hwconfig:
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DASHBOARD_SORT_INDEX: 1
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DASHBOARD_JOB_CATEGORY: "Basic"
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script:
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- source ./cva6/regress/hwconfig_tests.sh
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- source verif/regress/hwconfig_tests.sh
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- python3 .gitlab-ci/scripts/report_pass.py
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pub_compliance:
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@ -332,8 +261,8 @@ pub_compliance:
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DASHBOARD_SORT_INDEX: 2
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DASHBOARD_JOB_CATEGORY: "Test suites"
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script:
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- source cva6/regress/dv-riscv-compliance.sh
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- python3 .gitlab-ci/scripts/report_simu.py cva6/sim/logfile.log
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- source verif/regress/dv-riscv-compliance.sh
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- python3 .gitlab-ci/scripts/report_simu.py verif/sim/logfile.log
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pub_tests-v:
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extends:
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@ -350,8 +279,8 @@ pub_tests-v:
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DASHBOARD_SORT_INDEX: 3
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DASHBOARD_JOB_CATEGORY: "Test suites"
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script:
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- source cva6/regress/dv-riscv-tests.sh
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- python3 .gitlab-ci/scripts/report_simu.py cva6/sim/logfile.log
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- source verif/regress/dv-riscv-tests.sh
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- python3 .gitlab-ci/scripts/report_simu.py verif/sim/logfile.log
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pub_tests-p:
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extends:
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@ -368,8 +297,8 @@ pub_tests-p:
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DASHBOARD_SORT_INDEX: 4
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DASHBOARD_JOB_CATEGORY: "Test suites"
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script:
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- source cva6/regress/dv-riscv-tests.sh
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- python3 .gitlab-ci/scripts/report_simu.py cva6/sim/logfile.log
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- source verif/regress/dv-riscv-tests.sh
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- python3 .gitlab-ci/scripts/report_simu.py verif/sim/logfile.log
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pub_synthesis_others:
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timeout: 2 hours
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@ -391,19 +320,19 @@ pub_synthesis_others:
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DASHBOARD_JOB_CATEGORY: "Synthesis"
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script: &synth_script
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#ack trick to manage float gitlab-ci variables that seems to support only string or integer
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- echo $(echo $SYNTH_PERIOD)
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- echo $(echo $INPUT_DELAY)
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- echo $(echo $OUTPUT_DELAY)
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- echo $(echo $NAND2_AREA)
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- echo $SYNTH_PERIOD
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- echo $INPUT_DELAY
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- echo $OUTPUT_DELAY
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- echo $NAND2_AREA
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- echo $FOUNDRY_PATH
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- echo $PERIOD
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- echo $TECH_NAME
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- echo $TARGET
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- source ./cva6/regress/install-cva6.sh
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- source verif/regress/install-cva6.sh
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- echo $SYN_DCSHELL_BASHRC; source $SYN_DCSHELL_BASHRC
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- make -C core-v-cores/cva6/pd/synth cva6_synth PERIOD=$(echo $PERIOD) NAND2_AREA=$(echo $NAND2_AREA) FOUNDRY_PATH=$FOUNDRY_PATH TECH_NAME=$TECH_NAME INPUT_DELAY=$(echo $INPUT_DELAY) OUTPUT_DELAY=$(echo $OUTPUT_DELAY) TARGET=$TARGET
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- mv core-v-cores/cva6/pd/synth/cva6_${TARGET}_synth_modified.v artifacts/cva6_${TARGET}_synth_modified.v
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- python3 .gitlab-ci/scripts/report_synth.py core-v-cores/cva6/pd/synth/cva6_${TARGET}/reports/$PERIOD/cva6_$(echo $TECH_NAME)_synth_area.rpt core-v-cores/cva6/pd/synth/synthesis_batch.log
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- make -C pd/synth cva6_synth
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- mv pd/synth/cva6_${TARGET}_synth_modified.v artifacts/cva6_${TARGET}_synth_modified.v
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- python3 .gitlab-ci/scripts/report_synth.py pd/synth/cva6_${TARGET}/reports/$PERIOD/cva6_$(echo $TECH_NAME)_synth_area.rpt pd/synth/synthesis_batch.log
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rules:
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- when: manual
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allow_failure: true
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@ -424,7 +353,6 @@ pub_smoke-gate:
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- .backend_test
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- .template_job_always_manual
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needs:
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- *initjob
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- pub_build_tools
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- pub_synthesis
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variables:
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@ -434,21 +362,22 @@ pub_smoke-gate:
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DASHBOARD_JOB_CATEGORY: "Post Synthesis"
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TARGET: cv32a6_embedded
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script:
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- mkdir -p tools
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- mv artifacts/tools/spike tools
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- echo $SYN_VCS_BASHRC; source $SYN_VCS_BASHRC
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- echo $LIB_VERILOG
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- echo $FOUNDRY_PATH
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- echo $PERIOD
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- echo $TECH_NAME
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- source ./cva6/regress/install-cva6.sh
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- source ./cva6/regress/install-riscv-dv.sh
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- source ./cva6/regress/install-riscv-tests.sh
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- mv artifacts/cva6_${TARGET}_synth_modified.v core-v-cores/cva6/pd/synth/cva6_${TARGET}_synth_modified.v
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- cd cva6/sim
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- source verif/regress/install-cva6.sh
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- source verif/regress/install-riscv-dv.sh
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- source verif/regress/install-riscv-tests.sh
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- mv artifacts/cva6_${TARGET}_synth_modified.v pd/synth/cva6_${TARGET}_synth_modified.v
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- cd verif/sim
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- make vcs_clean_all
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- python3 cva6.py --testlist=../tests/testlist_riscv-tests-cv32a60x-p.yaml --test rv32ui-p-lw --iss_yaml cva6.yaml --target $TARGET --iss=spike,vcs-gate $DV_OPTS
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- cd -
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- python3 .gitlab-ci/scripts/report_simu.py cva6/sim/logfile.log
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- python3 .gitlab-ci/scripts/report_simu.py verif/sim/logfile.log
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pub_coremark:
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extends:
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@ -460,8 +389,8 @@ pub_coremark:
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DASHBOARD_SORT_INDEX: 5
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DASHBOARD_JOB_CATEGORY: "Performance"
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script:
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- bash cva6/regress/coremark.sh --no-print
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- python3 .gitlab-ci/scripts/report_benchmark.py --coremark cva6/sim/out_*/veri-testharness_sim/core_main.log
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- bash verif/regress/coremark.sh --no-print
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- python3 .gitlab-ci/scripts/report_benchmark.py --coremark verif/sim/out_*/veri-testharness_sim/core_main.log
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pub_dhrystone:
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extends:
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@ -473,8 +402,8 @@ pub_dhrystone:
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DASHBOARD_SORT_INDEX: 5
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DASHBOARD_JOB_CATEGORY: "Performance"
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script:
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- bash cva6/regress/dhrystone.sh
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- python3 .gitlab-ci/scripts/report_benchmark.py --dhrystone cva6/sim/out_*/veri-testharness_sim/dhrystone_main.log
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- bash verif/regress/dhrystone.sh
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- python3 .gitlab-ci/scripts/report_benchmark.py --dhrystone verif/sim/out_*/veri-testharness_sim/dhrystone_main.log
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pub_fpga-build:
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timeout: 90 minutes
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@ -489,11 +418,11 @@ pub_fpga-build:
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TARGET: cv32a60x
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script:
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- source $VIVADO_SETUP
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- source cva6/regress/install-cva6.sh
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- make -C core-v-cores/cva6 fpga target=$TARGET
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- source verif/regress/install-cva6.sh
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- make fpga target=$TARGET
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- mkdir -p artifacts/reports
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- mv core-v-cores/cva6/corev_apu/fpga/work-fpga/ariane_xilinx.bit artifacts/ariane_xilinx_$TARGET.bit
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- python3 .gitlab-ci/scripts/report_fpga.py core-v-cores/cva6/corev_apu/fpga/reports/ariane.utilization.rpt
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- mv corev_apu/fpga/work-fpga/ariane_xilinx.bit artifacts/ariane_xilinx_$TARGET.bit
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- python3 .gitlab-ci/scripts/report_fpga.py corev_apu/fpga/reports/ariane.utilization.rpt
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pub_generated_tests:
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tags: [$TAGS_RUNNER]
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@ -524,9 +453,9 @@ pub_generated_tests:
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DASHBOARD_JOB_DESCRIPTION: "Generate Random Arithmetic Jump tests using CVA6-DV"
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script:
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- mkdir -p artifacts/coverage
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- source ./cva6/regress/dv-generated-tests.sh
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- mv cva6/sim/vcs_results/default/vcs.d/simv.vdb artifacts/coverage
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- mv cva6/sim/seedlist.yaml artifacts/coverage
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- source verif/regress/dv-generated-tests.sh
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- mv verif/sim/vcs_results/default/vcs.d/simv.vdb artifacts/coverage
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- mv verif/sim/seedlist.yaml artifacts/coverage
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- python3 .gitlab-ci/scripts/report_pass.py
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rules:
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- when: manual
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@ -549,9 +478,9 @@ pub_generated_xif_tests:
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DASHBOARD_JOB_DESCRIPTION: "Generate Random tests for cvxif using CVA6-DV"
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script:
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- mkdir -p artifacts/coverage
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- source ./cva6/regress/dv-generated-xif-tests.sh
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- mv cva6/sim/vcs_results/default/vcs.d/simv.vdb artifacts/coverage
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- mv cva6/sim/seedlist.yaml artifacts/coverage
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- source verif/regress/dv-generated-xif-tests.sh
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- mv verif/sim/vcs_results/default/vcs.d/simv.vdb artifacts/coverage
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- mv verif/sim/seedlist.yaml artifacts/coverage
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- python3 .gitlab-ci/scripts/report_pass.py
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rules:
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- when: manual
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@ -574,8 +503,8 @@ pub_directed_isacov-tests:
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DASHBOARD_JOB_DESCRIPTION: "Execute directed tests to improve functional coverage of ISA"
|
||||
script:
|
||||
- mkdir -p artifacts/coverage
|
||||
- source ./cva6/regress/dv-generated-tests.sh
|
||||
- mv cva6/sim/vcs_results/default/vcs.d/simv.vdb artifacts/coverage
|
||||
- source verif/regress/dv-generated-tests.sh
|
||||
- mv verif/sim/vcs_results/default/vcs.d/simv.vdb artifacts/coverage
|
||||
- python3 .gitlab-ci/scripts/report_pass.py
|
||||
rules:
|
||||
- when: manual
|
||||
|
|
@ -598,8 +527,8 @@ pub_directed_xif-tests:
|
|||
DASHBOARD_JOB_DESCRIPTION: "Execute directed tests to improve functional coverage of cvxif"
|
||||
script:
|
||||
- mkdir -p artifacts/coverage
|
||||
- source ./cva6/regress/dv-generated-xif-tests.sh
|
||||
- mv cva6/sim/vcs_results/default/vcs.d/simv.vdb artifacts/coverage
|
||||
- source verif/regress/dv-generated-xif-tests.sh
|
||||
- mv verif/sim/vcs_results/default/vcs.d/simv.vdb artifacts/coverage
|
||||
- python3 .gitlab-ci/scripts/report_pass.py
|
||||
rules:
|
||||
- when: manual
|
||||
|
|
@ -613,7 +542,6 @@ pub_fpga-boot:
|
|||
extends:
|
||||
- .backend_test
|
||||
needs:
|
||||
- *initjob
|
||||
- pub_build_tools
|
||||
- pub_fpga-build
|
||||
variables:
|
||||
|
|
@ -624,21 +552,20 @@ pub_fpga-boot:
|
|||
DASHBOARD_SORT_INDEX: 10
|
||||
DASHBOARD_JOB_CATEGORY: "Synthesis"
|
||||
script:
|
||||
- source cva6/regress/install-cva6.sh
|
||||
- source verif/regress/install-cva6.sh
|
||||
- source $VIVADO2022_SETUP
|
||||
- mkdir -p core-v-cores/cva6/corev_apu/fpga/work-fpga
|
||||
- mv artifacts/ariane_xilinx_cv32a60x.bit core-v-cores/cva6/corev_apu/fpga/work-fpga/ariane_xilinx.bit
|
||||
- cd core-v-cores/cva6/corev_apu/fpga/scripts
|
||||
- mkdir -p corev_apu/fpga/work-fpga
|
||||
- mv artifacts/ariane_xilinx_cv32a60x.bit corev_apu/fpga/work-fpga/ariane_xilinx.bit
|
||||
- cd corev_apu/fpga/scripts
|
||||
- source check_fpga_boot.sh
|
||||
- cd -
|
||||
- python3 .gitlab-ci/scripts/report_fpga_boot.py core-v-cores/cva6/corev_apu/fpga/scripts/fpga_boot.rpt
|
||||
- python3 .gitlab-ci/scripts/report_fpga_boot.py corev_apu/fpga/scripts/fpga_boot.rpt
|
||||
|
||||
code_coverage-report:
|
||||
tags: [$TAGS_RUNNER]
|
||||
extends:
|
||||
- .backend_test
|
||||
needs:
|
||||
- *initjob
|
||||
- pub_generated_tests
|
||||
- pub_directed_isacov-tests
|
||||
- pub_generated_xif_tests
|
||||
|
|
@ -651,11 +578,11 @@ code_coverage-report:
|
|||
script:
|
||||
- echo $SYN_VCS_BASHRC; source $SYN_VCS_BASHRC
|
||||
- mkdir -p artifacts/cov_reports/
|
||||
- mkdir -p cva6/sim/vcs_results/default/vcs.d
|
||||
- mv artifacts/coverage/simv.vdb cva6/sim/vcs_results/default/vcs.d/
|
||||
- mv artifacts/coverage/seedlist.yaml cva6/sim/seedlist.yaml
|
||||
- make -C cva6/sim generate_cov_dash
|
||||
- mv cva6/sim/urgReport artifacts/cov_reports/
|
||||
- mkdir -p verif/sim/vcs_results/default/vcs.d
|
||||
- mv artifacts/coverage/simv.vdb verif/sim/vcs_results/default/vcs.d/
|
||||
- mv artifacts/coverage/seedlist.yaml verif/sim/seedlist.yaml
|
||||
- make -C verif/sim generate_cov_dash
|
||||
- mv verif/sim/urgReport artifacts/cov_reports/
|
||||
- python3 .gitlab-ci/scripts/report_pass.py
|
||||
rules:
|
||||
- when: on_success
|
||||
|
|
|
|||
|
|
@ -46,20 +46,13 @@ if workflow_type == 'github': # (from wrapper)
|
|||
cvv_sha = os.environ['CORE_V_VERIF_HASH'].strip('\'\"')
|
||||
cva6_branch = os.environ['CVA6_BRANCH'].strip('\'\"')
|
||||
cva6_sha = os.environ['CVA6_HASH'].strip('\'\"')
|
||||
else: # gitlab (from core-v-verif or cva6 repositories)
|
||||
else: # gitlab
|
||||
workflow_uid = os.environ['CI_PIPELINE_ID'].strip('\'\"')
|
||||
if os.environ['SCOPE_CVV'] == 'true':
|
||||
workflow_repo = 'core-v-verif'
|
||||
cvv_branch = os.environ['CI_COMMIT_REF_NAME'].strip('\'\"')
|
||||
cvv_sha = os.environ['CI_COMMIT_SHA'].strip('\'\"')
|
||||
cva6_branch = os.environ['CVA6_BRANCH'].strip('\'\"')
|
||||
cva6_sha = os.environ['CVA6_HASH'].strip('\'\"')
|
||||
else:
|
||||
workflow_repo = 'cva6'
|
||||
cvv_branch = os.environ['CORE_V_VERIF_BRANCH'].strip('\'\"')
|
||||
cvv_sha = os.environ['CORE_V_VERIF_HASH'].strip('\'\"')
|
||||
cva6_branch = os.environ['CI_COMMIT_REF_NAME'].strip('\'\"')
|
||||
cva6_sha = os.environ['CI_COMMIT_SHA'].strip('\'\"')
|
||||
workflow_repo = 'cva6'
|
||||
cvv_branch = 'none'
|
||||
cvv_sha = '0000000'
|
||||
cva6_branch = os.environ['CI_COMMIT_REF_NAME'].strip('\'\"')
|
||||
cva6_sha = os.environ['CI_COMMIT_SHA'].strip('\'\"')
|
||||
workflow_commit_subject = os.environ['CI_COMMIT_MESSAGE'].strip('\'\"')
|
||||
workflow_commit_author = os.environ['CI_COMMIT_AUTHOR'].strip('\'\"')
|
||||
|
||||
|
|
|
|||
|
|
@ -21,8 +21,8 @@ with open(str(sys.argv[2]), 'r') as f:
|
|||
synthesis_log = f.read()
|
||||
|
||||
kgate_ratio = int(os.environ["NAND2_AREA"])
|
||||
path_re = r'^core-v-cores/cva6/pd/synth/cva6_([^/]+)'
|
||||
with open("core-v-cores/cva6/.gitlab-ci/expected_synth.yml", "r") as f:
|
||||
path_re = r'^pd/synth/cva6_([^/]+)'
|
||||
with open(".gitlab-ci/expected_synth.yml", "r") as f:
|
||||
expected = yaml.safe_load(f)
|
||||
|
||||
#Compile & elaborate log:
|
||||
|
|
@ -68,9 +68,9 @@ if match:
|
|||
if abs(diff) >= 300:
|
||||
result_metric.fail()
|
||||
else:
|
||||
raise Exception("unexpected target: {target}")
|
||||
raise Exception(f"unexpected target: {target}")
|
||||
else:
|
||||
raise Exception("unexpected file name: {log_path}")
|
||||
raise Exception(f"unexpected file name: {log_path}")
|
||||
|
||||
|
||||
hier_metric = rb.TableMetric('Hierarchies details')
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue