Fixed strange shift arithmetic right issue

This commit is contained in:
Florian Zaruba 2017-04-09 14:23:36 +02:00
parent 1f102ef109
commit 14f3c0f284
2 changed files with 16 additions and 16 deletions

View file

@ -18,21 +18,21 @@ class alu_scoreboard extends uvm_scoreboard;
virtual function void write (fu_if_seq_item seq_item);
result = 64'b0;
result32 = 32'b0;
result32 = 32'b0;
case (alu_op'(seq_item.operator))
ADD:
result = seq_item.operand_a + seq_item.operand_b;
case(alu_op'(seq_item.operator))
ADD:
result = seq_item.operand_a + seq_item.operand_b;
ADDW: begin
result32 = seq_item.operand_a[31:0] + seq_item.operand_b[31:0];
result = {{32{result32[31]}}, result32}; // sign extend the result
end
SUB:
result = seq_item.operand_a - seq_item.operand_b;
SUBW: begin
result32 = seq_item.operand_a[31:0] - seq_item.operand_b[31:0];
result = {{32{result32[31]}}, result32};
end
result32 = seq_item.operand_a[31:0] + seq_item.operand_b[31:0];
result = {{32{result32[31]}}, result32}; // sign extend the result
end
SUB:
result = seq_item.operand_a - seq_item.operand_b;
SUBW: begin
result32 = seq_item.operand_a[31:0] - seq_item.operand_b[31:0];
result = {{32{result32[31]}}, result32};
end
XORL:
result = seq_item.operand_a ^ seq_item.operand_b;
ORL:
@ -40,7 +40,7 @@ class alu_scoreboard extends uvm_scoreboard;
ANDL:
result = seq_item.operand_a & seq_item.operand_b;
SRA:
result = $signed(seq_item.operand_a) >>> seq_item.operand_b[5:0];
result = $signed(seq_item.operand_a[63:0]) >>> seq_item.operand_b[5:0];
SRL:
result = $unsigned(seq_item.operand_a) >>> seq_item.operand_b[5:0];
SLL:
@ -60,7 +60,7 @@ class alu_scoreboard extends uvm_scoreboard;
endcase
if (result != seq_item.result)
`uvm_error("ALU Scoreboard", $sformatf("Result: %0h, Expected %0h", seq_item.result, result))
`uvm_error("ALU Scoreboard", $sformatf("Result: %0h, Expected %0h", seq_item.result, result))
endfunction : write;

View file

@ -40,7 +40,7 @@ class alu_test extends alu_test_base;
super.run_phase(phase);
add_sequence = new("add");
add_sequence.start(sequencer_h);
add_sequence.start(sequencer_h);
addw_sequence = new("addw");
addw_sequence.start(sequencer_h);