Fix initialization of memory array in simulation (#2259)

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CoralieAllioux 2024-06-14 14:34:08 +02:00 committed by GitHub
parent 3ed5e78c91
commit 205872acc6
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@ -163,7 +163,10 @@ module tc_sram #(
// write memory array
always_ff @(posedge clk_i or negedge rst_ni) begin
if (!rst_ni) begin
sram <= init_val;
// Fix to avoid runtime space reaching maximum capacity in simulation
foreach (init_val[i]) begin
sram[i] <= init_val[i];
end
for (int i = 0; i < NumPorts; i++) begin
r_addr_q[i] <= {AddrWidth{1'b0}};
// initialize the read output register for each port