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csr_regfile lint error fix (#2346)

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Asmaa Kassimi 2024-07-10 12:13:26 +01:00 • committed by GitHub
parent dc9dc150e7
commit 214444cc93
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GPG key ID: B5690EEEBB952194
2 changed files with 35 additions and 30 deletions
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44
core/csr_regfile.sv
View file

@ -1833,23 +1833,25 @@ module csr_regfile
// trap to supervisor mode
if (CVA6Cfg.RVS && trap_to_priv_lvl == riscv::PRIV_LVL_S) begin
if (CVA6Cfg.RVH && trap_to_v) begin
// update sstatus
vsstatus_d.sie = 1'b0;
vsstatus_d.spie = vsstatus_q.sie;
// this can either be user or supervisor mode
vsstatus_d.spp = priv_lvl_q[0];
// set cause
vscause_d = ex_i.cause[CVA6Cfg.XLEN-1] ? {ex_i.cause[CVA6Cfg.XLEN-1:2], 2'b01} : ex_i.cause;
// set epc
vsepc_d = {{CVA6Cfg.XLEN - CVA6Cfg.VLEN{pc_i[CVA6Cfg.VLEN-1]}}, pc_i};
// set vstval
vstval_d = (ariane_pkg::ZERO_TVAL
&& (ex_i.cause inside {
riscv::ILLEGAL_INSTR,
riscv::BREAKPOINT,
riscv::ENV_CALL_UMODE
} || ex_i.cause[CVA6Cfg.XLEN-1])) ? '0 : ex_i.tval;
if (CVA6Cfg.RVH) begin
if (trap_to_v) begin
// update sstatus
vsstatus_d.sie = 1'b0;
vsstatus_d.spie = vsstatus_q.sie;
// this can either be user or supervisor mode
vsstatus_d.spp = priv_lvl_q[0];
// set cause
vscause_d = ex_i.cause[CVA6Cfg.XLEN-1] ? {ex_i.cause[CVA6Cfg.XLEN-1:2], 2'b01} : ex_i.cause;
// set epc
vsepc_d = {{CVA6Cfg.XLEN - CVA6Cfg.VLEN{pc_i[CVA6Cfg.VLEN-1]}}, pc_i};
// set vstval
vstval_d = (ariane_pkg::ZERO_TVAL
&& (ex_i.cause inside {
riscv::ILLEGAL_INSTR,
riscv::BREAKPOINT,
riscv::ENV_CALL_UMODE
} || ex_i.cause[CVA6Cfg.XLEN-1])) ? '0 : ex_i.tval;
end
end else begin
// update sstatus
mstatus_d.sie = 1'b0;
@ -2213,8 +2215,12 @@ module csr_regfile
assign irq_ctrl_o.mie = mie_q;
assign irq_ctrl_o.mip = mip_q;
assign irq_ctrl_o.sie = (CVA6Cfg.RVH && v_q) ? vsstatus_q.sie : mstatus_q.sie;
assign irq_ctrl_o.mideleg = mideleg_q;
if (CVA6Cfg.RVH) begin
assign irq_ctrl_o.sie = (v_q) ? vsstatus_q.sie : mstatus_q.sie;
end else begin
assign irq_ctrl_o.sie = mstatus_q.sie;
end
assign irq_ctrl_o.mideleg = (CVA6Cfg.RVS) ? mideleg_q : '0;
assign irq_ctrl_o.hideleg = (CVA6Cfg.RVH) ? hideleg_q : '0;
assign irq_ctrl_o.global_enable = ~(CVA6Cfg.DebugEn & debug_mode_q)
// interrupts are enabled during single step or we are not stepping

21
spyglass/reference_summary.rpt
View file

@ -4,7 +4,7 @@
# This file has been generated by SpyGlass:
# Report Name : summary
# Report Created by: akassimi
# Report Created on: Tue Jul 2 16:35:29 2024
# Report Created on: Tue Jul 9 11:39:13 2024
# SpyGlass Version : SpyGlass_vS-2021.09-SP2-3
# Policy Name : SpyGlass(SpyGlass_vS-2021.09-SP2-03)
# clock-reset(SpyGlass_vS-2021.09-SP2-03)
@ -19,9 +19,9 @@
# starc2005(SpyGlass_vS-2021.09-SP2-03)
# txv(SpyGlass_vS-2021.09-SP2-03)
#
# Total Number of Generated Messages : 1327
# Total Number of Generated Messages : 1490
# Number of Waived Messages : 2
# Number of Reported Messages : 1325
# Number of Reported Messages : 1488
# Number of Overlimit Messages : 0
#
#
@ -67,7 +67,7 @@ WARNING SYNTH_12611 2 Property blocks will be ignored for
WARNING SYNTH_5064 37 Non-synthesizable statements are
ignored for synthesis.
WARNING SYNTH_5143 11 Initial block is ignored for synthesis
WARNING SYNTH_89 1 Initial Assignment at Declaration is
WARNING SYNTH_89 4 Initial Assignment at Declaration is
ignored by synthesis.
WARNING WRN_1024 3 Signed argument is passed to $signed
system function call, or unsigned
@ -86,10 +86,9 @@ INFO ElabSummary 1 Generates Elaborated design units
Severity Rule Name Count Short Help
===============================================================================
ERROR InferLatch 2 Latch inferred
ERROR UndrivenInTerm-ML 4 Undriven but loaded input terminal of
an instance detected
ERROR W123 20 A signal or variable has been read but
ERROR W123 18 A signal or variable has been read but
is not set
ERROR W416 1 Width of return type and return value
of a function should be same (Verilog)
@ -105,7 +104,7 @@ WARNING STARC05-1.3.1.3 1 Asynchronous reset/preset signals must
WARNING STARC05-2.1.3.1 2 Bit-width of function arguments must
match bit-width of the corresponding
function inputs.
WARNING STARC05-2.1.4.5 4 Bit-wise operators must be used instead
WARNING STARC05-2.1.4.5 1 Bit-wise operators must be used instead
of logic operators in multi-bit
operations.
WARNING STARC05-2.1.5.3 1 Conditional expressions should evaluate
@ -115,17 +114,17 @@ WARNING STARC05-2.2.3.3 14 Do not assign over the same signal in
circuits
WARNING W224 1 Multi-bit expression found when one-bit
expression expected
WARNING W240 311 An input has been declared but is not
WARNING W240 297 An input has been declared but is not
read
WARNING W263 4 A case expression width does not match
case select expression width
WARNING W287b 38 Output port of an instance is not
WARNING W287b 32 Output port of an instance is not
connected
WARNING W415a 537 Signal may be multiply assigned (beside
WARNING W415a 536 Signal may be multiply assigned (beside
initialization) in the same scope.
WARNING W480 3 Loop index is not of type integer
WARNING W486 2 Shift overflow - some bits may be lost
WARNING W528 295 A signal or variable is set but never
WARNING W528 481 A signal or variable is set but never
read
INFO W240 1 An input has been declared but is not
read