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Make interrupt sensitivity configurable in openpiton periphs, add sync stage

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Michael Schaffner 2019-05-22 12:37:26 +02:00 • committed by Florian Zaruba
parent 5edf35804f
commit 276d0c144c
1 changed files with 31 additions and 2 deletions
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33
openpiton/riscv_peripherals.sv
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@ -84,6 +84,7 @@ module riscv_peripherals #(
output [NumHarts-1:0] ipi_o, // software interrupt (a.k.a inter-process-interrupt)
// PLIC
input [NumSources-1:0] irq_sources_i,
input [NumSources-1:0] irq_le_i, // 0:level 1:edge
output [NumHarts-1:0][1:0] irq_o // level sensitive IR lines, mip & sip (async)
);
@ -744,6 +745,32 @@ module riscv_peripherals #(
assign reg_bus.error = plic_resp.error;
assign reg_bus.ready = plic_resp.ready;
// synchronization regs
logic [2:0][NumSources-1:0] irq_sources_d, irq_sources_q;
assign irq_sources_d = {irq_sources_q[$high(irq_sources_q)-1:0], irq_sources_i};
always_ff @(posedge clk_i or negedge rst_ni) begin : p_synch
if(!rst_ni) begin
irq_sources_q <= '0;
end else begin
irq_sources_q <= irq_sources_d;
end
end
// reshape pulse if needed
logic [NumSources-1:0] irq_sources_sync;
always_comb begin : p_wedge
for (int k=0; k<NumSources; k++) begin
if (irq_le_i[k]) begin
// edge
irq_sources_sync[k] = irq_sources_q[$high(irq_sources_q)-1][k] & ~irq_sources_q[$high(irq_sources_q)][k];
end else begin
// level
irq_sources_sync[k] = irq_sources_q[$high(irq_sources_q)][k];
end
end
end
plic_top #(
.N_SOURCE ( NumSources ),
.N_TARGET ( 2*NumHarts ),
@ -753,10 +780,12 @@ module riscv_peripherals #(
.rst_ni,
.req_i ( plic_req ),
.resp_o ( plic_resp ),
.le_i ( '0 ), // 0:level 1:edge
.irq_sources_i ,
.le_i ( irq_le_i ), // 0:level 1:edge
.irq_sources_i ( irq_sources_sync ),
.eip_targets_o ( irq_o )
);
endmodule // riscv_peripherals