fix: exception on misaligned branch if no RVC (#1719)

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Côme 2023-12-19 10:03:11 +01:00 committed by GitHub
parent 4103b2ccdc
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@ -99,6 +99,8 @@ module branch_unit #(
branch_exception_o.tval = {{riscv::XLEN - riscv::VLEN{pc_i[riscv::VLEN-1]}}, pc_i};
// Only throw instruction address misaligned exception if this is indeed a `taken` conditional branch or
// an unconditional jump
if (branch_valid_i && target_address[0] != 1'b0 && jump_taken) branch_exception_o.valid = 1'b1;
if (branch_valid_i && (target_address[0] || (!CVA6Cfg.RVC && target_address[1])) && jump_taken) begin
branch_exception_o.valid = 1'b1;
end
end
endmodule