github-mirrors/cva6
1
0
Fork 0
mirror of https://github.com/openhwgroup/cva6.git synced 2025-06-27 17:00:57 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

instr_tracer.sv: Fix double sampling (#2782)
Some checks failed
bender-up-to-date / bender-up-to-date (push) Has been cancelled
Details
ci / build-riscv-tests (push) Has been cancelled
Details
ci / execute-riscv64-tests (push) Has been cancelled
Details
ci / execute-riscv32-tests (push) Has been cancelled
Details

Browse source 
Currently, the instruction trace update logic is triggered on both clock
edges, leading to double entries in the instruction trace and a wrong
cycle count. Fix this by updating the trace only on positive clock edges.

Signed-off-by: Nils Wistoff <nwistoff@iis.ee.ethz.ch>
This commit is contained in:
Nils Wistoff 2025-02-20 17:18:59 +11:00 • committed by GitHub
parent a55db35bd1
commit 2d411b2dc8
No known key found for this signature in database
GPG key ID: B5690EEEBB952194
1 changed files with 1 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

2
common/local/util/instr_tracer.sv
View file

@ -94,7 +94,7 @@ module instr_tracer #(
forever begin
automatic bp_resolve_t bp_instruction = '0;
// new cycle, we are only interested if reset is de-asserted
@(pck) if (rstn !== 1'b1) begin
@(posedge pck) if (rstn !== 1'b1) begin
flush();
continue;
end