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Repair AMO test Makefile target
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parent
6ecb9c5b46
commit
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1 changed files with 13 additions and 4 deletions
17
Makefile
17
Makefile
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@ -106,6 +106,7 @@ riscv-asm-tests-list := ci/riscv-asm-tests.list
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riscv-amo-tests-list := ci/riscv-amo-tests.list
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riscv-benchmarks-list := ci/riscv-benchmarks.list
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riscv-asm-tests := $(shell xargs printf '\n%s' < $(riscv-asm-tests-list) | cut -b 1-)
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riscv-amo-tests := $(shell xargs printf '\n%s' < $(riscv-amo-tests-list) | cut -b 1-)
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riscv-benchmarks := $(shell xargs printf '\n%s' < $(riscv-benchmarks-list) | cut -b 1-)
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# Search here for include files (e.g.: non-standalone components)
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@ -172,6 +173,11 @@ $(riscv-asm-tests): build
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+BASEDIR=$(riscv-test-dir) $(uvm-flags) +jtag_rbb_enable=0 -gblso $(RISCV)/lib/libfesvr.so -sv_lib $(dpi-library)/ariane_dpi \
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${top_level}_optimized +permissive-off ++$(riscv-test-dir)/$@ ++$(target-options) | tee tmp/riscv-asm-tests-$@.log
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$(riscv-amo-tests): build
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vsim${questa_version} +permissive $(questa-flags) $(questa-cmd) -lib $(library) +max-cycles=$(max_cycles) +UVM_TESTNAME=$(test_case) \
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+BASEDIR=$(riscv-test-dir) $(uvm-flags) +jtag_rbb_enable=0 -gblso $(RISCV)/lib/libfesvr.so -sv_lib $(dpi-library)/ariane_dpi \
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${top_level}_optimized +permissive-off ++$(riscv-test-dir)/$@ ++$(target-options) | tee tmp/riscv-amo-tests-$@.log
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$(riscv-benchmarks): build
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vsim${questa_version} +permissive $(questa-flags) $(questa-cmd) -lib $(library) +max-cycles=$(max_cycles) +UVM_TESTNAME=$(test_case) \
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+BASEDIR=$(riscv-benchmarks-dir) $(uvm-flags) +jtag_rbb_enable=0 -gblso $(RISCV)/lib/libfesvr.so -sv_lib $(dpi-library)/ariane_dpi \
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@ -229,6 +235,13 @@ verilate:
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$(addsuffix -verilator,$(riscv-asm-tests)): verilate
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$(ver-library)/Variane_testharness $(riscv-test-dir)/$(subst -verilator,,$@)
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$(addsuffix -verilator,$(riscv-amo-tests)): verilate
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$(ver-library)/Variane_testharness $(riscv-test-dir)/$(subst -verilator,,$@)
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$(addsuffix -verilator,$(riscv-benchmarks)): verilate
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$(ver-library)/Variane_testharness $(riscv-benchmarks-dir)/$(subst -verilator,,$@)
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run-asm-tests-verilator: $(addsuffix -verilator, $(riscv-asm-tests)) $(addsuffix -verilator, $(riscv-amo-tests))
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# split into two halfs for travis jobs (otherwise they will time out)
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@ -238,10 +251,6 @@ run-asm-tests2-verilator: $(addsuffix -verilator, $(filter-out rv64ui-v-% ,$(ris
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run-amo-verilator: $(addsuffix -verilator, $(riscv-amo-tests))
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$(addsuffix -verilator,$(riscv-benchmarks)): verilate
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$(ver-library)/Variane_testharness $(riscv-benchmarks-dir)/$(subst -verilator,,$@)
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run-benchmarks-verilator: $(addsuffix -verilator,$(riscv-benchmarks))
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# torture-specific
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