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Add fpga cleanup to make clean target (#789)

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Andreas Kuster 2022-01-14 15:00:57 +01:00 • committed by GitHub
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Makefile
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@ -779,6 +779,7 @@ clean:
rm -rf $(riscv-torture-dir)/output/test*
rm -rf $(library)/ $(dpi-library)/ $(ver-library)/ $(vcs-library)/
rm -f tmp/*.ucdb tmp/*.log *.wlf *vstf wlft* *.ucdb
cd corev_apu/fpga && make clean && cd ../..
.PHONY:
build sim sim-verilate clean \