ci: test PMP with CV32A60X (#2825)
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Bring the tests added by #2648 in Gitlab CI:
* Rename PMP tests with generic names
* Add a CV32A60X PMP testlist
* Adapt PMP test script to run the testlist
* Add a CI job running said test script
This commit is contained in:
Valentin Thomazic 2025-03-12 23:21:10 +01:00 committed by GitHub
parent 3a389af151
commit 45e845d165
No known key found for this signature in database
GPG key ID: B5690EEEBB952194
14 changed files with 171 additions and 347 deletions

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@ -304,6 +304,20 @@ fpga-build:
- mv corev_apu/fpga/work-fpga/ariane_xilinx.bit artifacts/ariane_xilinx_$TARGET.bit
- python3 .gitlab-ci/scripts/report_fpga.py corev_apu/fpga/reports/ariane.utilization.rpt
pmp_tests:
timeout : 2 hours
extends:
- .synthesis_test
variables:
DASHBOARD_JOB_TITLE: "PMP $DV_TARGET"
DASHBOARD_JOB_DESCRIPTION: "Physical Memory Protection tests"
DASHBOARD_SORT_INDEX: 2
DASHBOARD_JOB_CATEGORY: "Test suites"
DV_SIMULATORS: "vcs-uvm"
SPIKE_TANDEM: 1
script: source verif/regress/pmp_cv32a60x_tests.sh
after_script: *simu_after_script
.regress_test:
stage: heavy tests
before_script:

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@ -0,0 +1,41 @@
##-----------------------------------------------------------------------------
## Copyright 2024 Robert Bosch GmbH
##
## SPDX-License-Identifier: SHL-0.51
##
## Original Author: Konstantinos Leventos - Robert Bosch France SAS
##-----------------------------------------------------------------------------
# Where the tools are
if ! [ -n "$RISCV" ]; then
echo "Error: RISCV variable undefined"
return
fi
# Install the required tools
source ./verif/regress/install-spike.sh
# Setup sim env
source ./verif/sim/setup-env.sh
if ! [ -n "$DV_SIMULATORS" ]; then
DV_SIMULATORS=vcs-uvm
fi
if ! [ -n "$UVM_VERBOSITY" ]; then
UVM_VERBOSITY=UVM_NONE
fi
export DV_OPTS="$DV_OPTS --issrun_opts=+debug_disable=1+UVM_VERBOSITY=$UVM_VERBOSITY"
export DV_TARGET=cv32a60x
make clean
cd verif/sim/
make clean_all
python3 cva6.py --testlist=../tests/testlist_pmp-$DV_TARGET.yaml --target $DV_TARGET --iss_yaml=cva6.yaml --iss=$DV_SIMULATORS $DV_OPTS --linker=../../config/gen_from_riscv_config/cv32a60x/linker/link.ld
make clean_all
cd -
make clean

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@ -1,278 +0,0 @@
##-----------------------------------------------------------------------------
## Copyright 2024 Robert Bosch GmbH
##
## SPDX-License-Identifier: SHL-0.51
##
## Original Author: Konstantinos Leventos - Robert Bosch France SAS
##-----------------------------------------------------------------------------
# Where the tools are
if ! [ -n "$RISCV" ]; then
echo "Error: RISCV variable undefined"
return
fi
# Install the required tools
source ./verif/regress/install-verilator.sh
# Setup sim env
source ./verif/sim/setup-env.sh
if ! [ -n "$DV_SIMULATORS" ]; then
DV_SIMULATORS=vcs-uvm
fi
if ! [ -n "$UVM_VERBOSITY" ]; then
UVM_VERBOSITY=UVM_NONE
fi
SIMUENV_VCS_TESTHARNESS=`echo $DV_SIMULATORS | grep -c vcs-testharness`
SIMUENV_VCS_UVM=`echo $DV_SIMULATORS | grep -c vcs-uvm`
SIMUENV_XRUN_UVM=`echo $DV_SIMULATORS | grep -c xrun-uvm`
SIMULATOR_VCS=`echo $DV_SIMULATORS | grep -c vcs`
SIMULATOR_XRUN=`echo $DV_SIMULATORS | grep -c xrun`
export DV_OPTS="$DV_OPTS"
export DV_OPTS="$DV_OPTS --iss_timeout 2000"
if [ $SIMULATOR_VCS == 1 ]; then
export ISSCOMP_OPTS="$ISSCOMP_OPTS -debug_access+r"
fi
export ISSRUN_OPTS="$ISSRUN_OPTS +debug_disable=1"
export ISSRUN_OPTS="$ISSRUN_OPTS +UVM_VERBOSITY=$UVM_VERBOSITY"
if [ $SIMULATOR_XRUN == 1 ]; then
export ISSRUN_OPTS="$ISSRUN_OPTS -gui"
fi
export SPIKE_PARAMS="--help"
export DEBUG_FILE=""
TEST_TARGET="#cv32a65x#"
cd verif/sim/
# ------------------------------------------------------------------------------
#1# pmp_cv32a65x_granularity_test.S on cv32a65x
echo "running #1# pmp_cv32a65x_granularity_test.S on cv32a65x with $DV_SIMULATORS"
python3 cva6.py \
--target cv32a65x \
--iss_yaml=cva6.yaml \
--iss=$DV_SIMULATORS \
--asm_tests ../tests/custom/pmp_cv32a65x/pmp_cv32a65x_granularity_test.S \
--linker=../../config/gen_from_riscv_config/cv32a65x/linker/link.ld \
--gcc_opts="-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles \
-g ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -lgcc \
-I../tests/custom/env -I../tests/custom/common" \
$DV_OPTS \
--debug="$DEBUG_FILE" \
--spike_params="$SPIKE_PARAMS" \
--issrun_opts="$ISSRUN_OPTS" \
--isscomp_opts="$ISSCOMP_OPTS"
make -C ../.. clean
make clean_all
# ------------------------------------------------------------------------------
#2# pmp_cv32a65x_exact_csrr_test.S on cv32a65x
echo "running #2# pmp_cv32a65x_exact_csrr_test.S on cv32a65x with $DV_SIMULATORS"
python3 cva6.py \
--target cv32a65x \
--iss_yaml=cva6.yaml \
--iss=$DV_SIMULATORS \
--asm_tests ../tests/custom/pmp_cv32a65x/pmp_cv32a65x_exact_csrr_test.S \
--linker=../../config/gen_from_riscv_config/cv32a65x/linker/link.ld \
--gcc_opts="-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles \
-g ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -lgcc \
-I../tests/custom/env -I../tests/custom/common" \
$DV_OPTS \
--debug="$DEBUG_FILE" \
--spike_params="$SPIKE_PARAMS" \
--issrun_opts="$ISSRUN_OPTS" \
--isscomp_opts="$ISSCOMP_OPTS"
make -C ../.. clean
make clean_all
# ------------------------------------------------------------------------------
#3# pmp_cv32a65x_lsu_tor_test.S on cv32a65x
echo "running #3# pmp_cv32a65x_lsu_tor_test.S on cv32a65x with $DV_SIMULATORS"
python3 cva6.py \
--target cv32a65x \
--iss_yaml=cva6.yaml \
--iss=$DV_SIMULATORS \
--asm_tests ../tests/custom/pmp_cv32a65x/pmp_cv32a65x_lsu_tor_test.S \
--linker=../../config/gen_from_riscv_config/cv32a65x/linker/link.ld \
--gcc_opts="-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles \
-g ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -lgcc \
-I../tests/custom/env -I../tests/custom/common" \
$DV_OPTS \
--debug="$DEBUG_FILE" \
--spike_params="$SPIKE_PARAMS" \
--issrun_opts="$ISSRUN_OPTS" \
--isscomp_opts="$ISSCOMP_OPTS"
make -C ../.. clean
make clean_all
## ------------------------------------------------------------------------------
##4# pmp_cv32a65x_lsu_napot_test.S not supported on cv32a65x config
#
#echo "running #4# pmp_cv32a65x_lsu_napot_test.S on cv32a65x with $DV_SIMULATORS"
#
#python3 cva6.py \
# --target cv32a65x \
# --iss_yaml=cva6.yaml \
# --iss=$DV_SIMULATORS \
# --asm_tests ../tests/custom/pmp_cv32a65x/pmp_cv32a65x_lsu_napot_test.S \
# --linker=../../config/gen_from_riscv_config/cv32a65x/linker/link.ld \
# --gcc_opts="-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles \
# -g ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -lgcc \
# -I../tests/custom/env -I../tests/custom/common" \
# $DV_OPTS \
# --debug="$DEBUG_FILE" \
# --spike_params="$SPIKE_PARAMS" \
# --issrun_opts="$ISSRUN_OPTS" \
# --isscomp_opts="$ISSCOMP_OPTS"
#
#make -C ../.. clean
#make clean_all
# ------------------------------------------------------------------------------
#5# pmp_cv32a65x_decreasing_entries_test.S on cv32a65x
echo "running #5# pmp_cv32a65x_decreasing_entries_test.S on cv32a65x with $DV_SIMULATORS"
python3 cva6.py \
--target cv32a65x \
--iss_yaml=cva6.yaml \
--iss=$DV_SIMULATORS \
--asm_tests ../tests/custom/pmp_cv32a65x/pmp_cv32a65x_decreasing_entries_test.S \
--linker=../../config/gen_from_riscv_config/cv32a65x/linker/link.ld \
--gcc_opts="-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles \
-g ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -lgcc \
-I../tests/custom/env -I../tests/custom/common" \
$DV_OPTS \
--debug="$DEBUG_FILE" \
--spike_params="$SPIKE_PARAMS" \
--issrun_opts="$ISSRUN_OPTS" \
--isscomp_opts="$ISSCOMP_OPTS"
make -C ../.. clean
make clean_all
# ------------------------------------------------------------------------------
#6# pmp_cv32a65x_defined_matches_test.S is not supported on cv32a65x
#
#echo "running #6# pmp_cv32a65x_defined_matches_test.S on cv32a65x with $DV_SIMULATORS"
#
#python3 cva6.py \
# --target cv32a65x \
# --iss_yaml=cva6.yaml \
# --iss=$DV_SIMULATORS \
# --asm_tests ../tests/custom/pmp_cv32a65x/pmp_cv32a65x_defined_matches_test.S \
# --linker=../../config/gen_from_riscv_config/cv32a65x/linker/link.ld \
# --gcc_opts="-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles \
# -g ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -lgcc \
# -I../tests/custom/env -I../tests/custom/common" \
# $DV_OPTS \
# --debug="$DEBUG_FILE" \
# --spike_params="$SPIKE_PARAMS" \
# --issrun_opts="$ISSRUN_OPTS" \
# --isscomp_opts="$ISSCOMP_OPTS"
#
#make -C ../.. clean
#make clean_all
## ------------------------------------------------------------------------------
##7# pmp_cv32a65x_double_entries_test.S is not supported cv32a65x (uses NAPOT)
#
#echo "running #7# pmp_cv32a65x_double_entries_test.S on cv32a65x with $DV_SIMULATORS"
#
#python3 cva6.py \
# --target cv32a65x \
# --iss_yaml=cva6.yaml \
# --iss=$DV_SIMULATORS \
# --asm_tests ../tests/custom/pmp_cv32a65x/pmp_cv32a65x_double_entries_test.S \
# --linker=../../config/gen_from_riscv_config/cv32a65x/linker/link.ld \
# --gcc_opts="-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles \
# -g ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -lgcc \
# -I../tests/custom/env -I../tests/custom/common" \
# $DV_OPTS \
# --debug="$DEBUG_FILE" \
# --spike_params="$SPIKE_PARAMS" \
# --issrun_opts="$ISSRUN_OPTS" \
# --isscomp_opts="$ISSCOMP_OPTS"
#
#make -C ../.. clean
#make clean_all
# ------------------------------------------------------------------------------
##8# pmp_cv32a65x_locked_outside_napot_test.S not supported on cv32a65x
#
#echo "running #8# pmp_cv32a65x_locked_outside_napot_test.S on cv32a65x with $DV_SIMULATORS"
#
#python3 cva6.py \
# --target cv32a65x \
# --iss_yaml=cva6.yaml \
# --iss=$DV_SIMULATORS \
# --asm_tests ../tests/custom/pmp_cv32a65x/pmp_cv32a65x_locked_outside_napot_test.S \
# --linker=../../config/gen_from_riscv_config/cv32a65x/linker/link.ld \
# --gcc_opts="-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles \
# -g ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -lgcc \
# -I../tests/custom/env -I../tests/custom/common" \
# $DV_OPTS \
# --debug="$DEBUG_FILE" \
# --spike_params="$SPIKE_PARAMS" \
# --issrun_opts="$ISSRUN_OPTS" \
# --isscomp_opts="$ISSCOMP_OPTS"
#
#make -C ../.. clean
#make clean_all
# ------------------------------------------------------------------------------
#9# pmp_cv32a65x_locked_outside_tor_test.S on cv32a65x
echo "running #9# pmp_cv32a65x_locked_outside_tor_test.S on cv32a65x with $DV_SIMULATORS"
python3 cva6.py \
--target cv32a65x \
--iss_yaml=cva6.yaml \
--iss=$DV_SIMULATORS \
--asm_tests ../tests/custom/pmp_cv32a65x/pmp_cv32a65x_locked_outside_tor_test.S \
--linker=../../config/gen_from_riscv_config/cv32a65x/linker/link.ld \
--gcc_opts="-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles \
-g ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -lgcc \
-I../tests/custom/env -I../tests/custom/common" \
$DV_OPTS \
--debug="$DEBUG_FILE" \
--spike_params="$SPIKE_PARAMS" \
--issrun_opts="$ISSRUN_OPTS" \
--isscomp_opts="$ISSCOMP_OPTS"
make -C ../.. clean
make clean_all
cd -

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@ -5,9 +5,9 @@
#
# Original Author: Konstantinos LEVENTOS - Robert Bosch France SAS
# ------------------------------------------------------------------------------
# pmp_cv32a65x_decreasing_entries_test.S (TST04-4)
# decreasing_entries_test.S (TST04-4)
# ------------------------------------------------------------------------------
.text
.globl main
main:
@ -31,15 +31,15 @@ main:
csrw pmpaddr4, t0
# From 0x0002_0000 to 0x8000_0000 no Permissions.
li t0, 0x20000000
li t0, 0x20000000
csrw pmpaddr3, t0
# From 0x0001_0000 to 0x0002_0000 only Execute.
li t0, 0x00008000
li t0, 0x00008000
csrw pmpaddr2, t0
# From 0x0000_1000 to 0x0001_0000 no Permissions.
li t0, 0x00004000
li t0, 0x00004000
csrw pmpaddr1, t0
# From 0x0000_0000 to 0x0000_1000 only Execute.

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@ -5,9 +5,9 @@
#
# Original Author: Konstantinos LEVENTOS - Robert Bosch France SAS
# ------------------------------------------------------------------------------
# pmp_cv32a65x_defined_matches_test.S (TST10-1, TST10-2)
# defined_matches_test.S (TST10-1, TST10-2)
# ------------------------------------------------------------------------------
.text
.globl main
main:

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@ -5,7 +5,7 @@
#
# Original Author: Konstantinos LEVENTOS - Robert Bosch France SAS
# ------------------------------------------------------------------------------
# pmp_cv32a65x_double_entries_test.S (TST04-2)
# double_entries_test.S (TST04-2)
# ------------------------------------------------------------------------------
.text
@ -22,7 +22,7 @@ main:
csrr t1, pmpaddr6
bne t0, t1, fail
# Set up PMP using NAPOT, from 0x8000_0000 to 0x9000_0000, Read-Write.
# Set up PMP using NAPOT, from 0x8000_0000 to 0x9000_0000, Read-Write.
li t0, 0x001b0000
csrw pmpcfg0, t0
csrr t1, pmpcfg0

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@ -5,14 +5,14 @@
#
# Original Author: Konstantinos LEVENTOS - Robert Bosch France SAS
# ------------------------------------------------------------------------------
# pmp_cv32a65x_exact_csrr_test.S (TST05-1)
# exact_csrr_test.S (TST05-1)
# ------------------------------------------------------------------------------
.text
.globl main
main:
# Write in addresses and check what is written.
# Write in addresses and check what is written.
# Checking PMP ADDR 0
li t0, 0xFACADE00

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@ -5,14 +5,14 @@
#
# Original Author: Konstantinos LEVENTOS - Robert Bosch France SAS
# ------------------------------------------------------------------------------
# pmp_cv32a65x_granularity_test.S (TST01)
# granularity_test.S (TST01)
# ------------------------------------------------------------------------------
.text
.globl main
main:
# Configure PMP to find its granularity.
# Configure PMP to find its granularity.
# Write all zeroes in cfg0.
li t0, 0

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@ -5,14 +5,14 @@
#
# Original Author: Konstantinos LEVENTOS - Robert Bosch France SAS
# ------------------------------------------------------------------------------
# pmp_cv32a65x_locked_outside_napot_test.S (TST14-26, TST14-36)
# locked_outside_napot_test.S (TST14-26, TST14-36)
# ------------------------------------------------------------------------------
.text
.globl main
main:
# Set up PMP using NAPOT, from 0x8000_0000 to 0xB000_0000.
# Set up PMP using NAPOT, from 0x8000_0000 to 0xB000_0000.
li t2, 0x25ffffff
csrw pmpaddr0, t2

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@ -5,9 +5,9 @@
#
# Original Author: Konstantinos LEVENTOS - Robert Bosch France SAS
# ------------------------------------------------------------------------------
# pmp_cv32a65x_locked_outside_tor_test.S (TST16-26, TST16-36)
# locked_outside_tor_test.S (TST16-26, TST16-36)
# ------------------------------------------------------------------------------
.text
.globl main
main:
@ -17,19 +17,19 @@ main:
csrw pmpaddr0, t0
# From 0x0000_1000 to 0x0001_0000 no Permissions.
li t0, 0x00004000
li t0, 0x00004000
csrw pmpaddr1, t0
# From 0x0001_0000 to 0x0002_0000 only Execute.
li t0, 0x00008000
li t0, 0x00008000
csrw pmpaddr2, t0
# From 0x0002_0000 to 0x8000_0000 no Permissions.
li t0, 0x20000000
li t0, 0x20000000
csrw pmpaddr3, t0
# From 0x8000_0000 to 0xB000_0000 Read-Write-Execute.
li t0, 0x2C000000
li t0, 0x2C000000
csrw pmpaddr4, t0
# Configure the TOR areas with LOCK ON.
@ -41,7 +41,7 @@ main:
csrw pmpcfg1, t0
csrr t1, pmpcfg1
bne t0, t1, fail
# Check a memory access succeeds when outside the LOCKED entry.
li t1, 0xB8000000
li t2, 0xC0D1F1ED

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@ -5,9 +5,9 @@
#
# Original Author: Konstantinos LEVENTOS - Robert Bosch France SAS
# ------------------------------------------------------------------------------
# pmp_cv32a65x_lsu_napot_test.S (TST14-11, TST14-21, TST14-31)
# lsu_napot_test.S (TST14-11, TST14-21, TST14-31)
# ------------------------------------------------------------------------------
.text
.globl main
main:
@ -19,11 +19,11 @@ main:
csrw pmpaddr0, t0
# From 0x0001_0000 to 0x0002_0000 only Execute.
li t0, 0x00005fff
li t0, 0x00005fff
csrw pmpaddr1, t0
# From 0x8000_0000 to 0xC000_0000 Read-Write-Execute.
li t0, 0x27ffffff
li t0, 0x27ffffff
csrw pmpaddr2, t0
@ -65,8 +65,8 @@ main:
bne t2, t3, fail
# Do the EXEC "RET" test.
# Do the EXEC "RET" test.
# Exec test 1, at 0x0000_0800.
li t0, 0x00000800
li t1, 0x8082
@ -98,7 +98,7 @@ main:
lw t2, 0(t0)
bne t1, t2, fail
jalr t0
pass:
# Success post-processing

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@ -5,9 +5,9 @@
#
# Original Author: Konstantinos LEVENTOS - Robert Bosch France SAS
# ------------------------------------------------------------------------------
# pmp_cv32a65x_lsu_tor_test.S (TST16-11, TST16-21, TST16-31)
# lsu_tor_test.S (TST16-11, TST16-21, TST16-31)
# ------------------------------------------------------------------------------
.text
.globl main
main:
@ -19,19 +19,19 @@ main:
csrw pmpaddr0, t0
# From 0x0000_1000 to 0x0001_0000 no Permissions.
li t0, 0x00004000
li t0, 0x00004000
csrw pmpaddr1, t0
# From 0x0001_0000 to 0x0002_0000 only Execute.
li t0, 0x00008000
li t0, 0x00008000
csrw pmpaddr2, t0
# From 0x0002_0000 to 0x8000_0000 no Permissions.
li t0, 0x20000000
li t0, 0x20000000
csrw pmpaddr3, t0
# From 0x8000_0000 to 0xC000_0000 Read-Write-Execute.
li t0, 0x30000000
li t0, 0x30000000
csrw pmpaddr4, t0
@ -79,8 +79,8 @@ main:
bne t2, t3, fail
# Do the EXEC "RET" test.
# Do the EXEC "RET" test.
# Exec test 1, at 0x0000_0800.
li t0, 0xA0000800
li t1, 0x8082

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@ -1,30 +0,0 @@
# ------------------------------------------------------------------------------
# Copyright 2024 Robert Bosch GmbH
#
# SPDX-License-Identifier: SHL-0.51
#
# Original Author: Konstantinos LEVENTOS - Robert Bosch France SAS
# ------------------------------------------------------------------------------
# pmp_cv32a65x_read_me_first.txt
# ------------------------------------------------------------------------------
Steps to run the pmp_cv32a65x tests:
Optional Step 0. If there is still a problem with $data/FE/cva6_lib/cva6/verif/env/uvme/cov/uvme_exception_covg.sv
comment out line 112 of that same file. This step is a hotfix and should be deleted from this file
as soon as the problem with the coverage is resolved.
1. Go to the main cva6 project folder, usually with cd $data/FE/cva6_lib/cva6
2. Export the following values, this is mandatory, and may be different with your local environment:
export PATH=$PATH:/tools/vtec/tools/devicetree/1.4.6/rh7/usr/bin
export VERILATOR_INSTALL_DIR=/tools/vtec/tools/veripool/verilator/5.008/rh7/
export RISCV=/tools/vtec/tools/embecosm/riscv32-embecosm-centos7-gcc13.1.0
export CV_SW_PREFIX=riscv32-unknown-elf-
export RISCV_PREFIX=${RISCV}/bin/${CV_SW_PREFIX}
export RISCV_GCC=${RISCV_PREFIX}gcc
export XCELIUM_HOME=/tools/cds/xceliummain_23.09.005_Linux/
3. Run the setup environment script as well in ./verif/sim/setup-env.sh
4. Edit the file in $data/FE/cva6_lib/cva6/verif/regress/pmp_cv32a65x_tests.sh to select which test to run:
For example, with TEST_NUMBER="#1#" uncommented, the (currently failing) test "granularity" will run.
Optional Step 4,5. It is good to check / force the versions of some modules used, specifically:
module load std/gcc/9.2.0 -f
module std/python/3.11.4 -f
5. Run that very same file from the cva6 folder specifically, usually with sh ./verif/regress/pmp_cv32a65x_tests.sh

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@ -0,0 +1,77 @@
# Copyright 2025 Thales CDI
#
# Licensed under the Solderpad Hardware Licence, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.0
# You may obtain a copy of the License at https:#solderpad.org/licenses/
#
# Original Author: Valentin Thomazic (valentin.thomazic@thalesgroup.com)
# ================================================================================
# Regression test list format
# --------------------------------------------------------------------------------
# testlist : Assembly test list
# test : Assembly test name
# description : Description of this test
# gen_opts : Instruction generator options
# iterations : Number of iterations of this test
# no_iss : Enable/disable ISS simulator (Optional)
# gen_test : Test name used by the instruction generator
# asm_tests : Path to directed, hand-coded assembly test file or directory
# rtl_test : RTL simulation test name
# cmp_opts : Compile options passed to the instruction generator
# sim_opts : Simulation options passed to the instruction generator
# no_post_compare : Enable/disable comparison of trace log and ISS log (Optional)
# compare_opts : Options for the RTL & ISS trace comparison
# gcc_opts : gcc compile options
# --------------------------------------------------------------------------------
common_test_config: &common_test_config
path_var: TESTS_PATH
gcc_opts: "-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -I../tests/custom/env -I../tests/custom/common -lgcc"
testlist:
- test: decreasing_entries_test
<<: *common_test_config
iterations: 1
asm_tests: <path_var>/custom/pmp/decreasing_entries_test.S
- test: defined_matches
<<: *common_test_config
iterations: 0
asm_tests: <path_var>/custom/pmp/defined_matches.S
- test: double_entries_test
<<: *common_test_config
iterations: 0
asm_tests: <path_var>/custom/pmp/double_entries_test.S
- test: exact_csrr_test
<<: *common_test_config
iterations: 1
asm_tests: <path_var>/custom/pmp/exact_csrr_test.S
- test: granularity_test
<<: *common_test_config
iterations: 1
asm_tests: <path_var>/custom/pmp/granularity_test.S
- test: locked_outside_napot_test
<<: *common_test_config
iterations: 0
asm_tests: <path_var>/custom/pmp/locked_outside_napot_test.S
- test: locked_outside_tor_test
<<: *common_test_config
iterations: 1
asm_tests: <path_var>/custom/pmp/locked_outside_tor_test.S
- test: lsu_napot_test
<<: *common_test_config
iterations: 0
asm_tests: <path_var>/custom/pmp/lsu_napot_test.S
- test: lsu_tor_test
<<: *common_test_config
iterations: 1
asm_tests: <path_var>/custom/pmp/lsu_tor_test.S