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Add VM CI tests - increase TB mem size

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Florian Zaruba 2017-06-26 17:46:47 +02:00
parent ebf23d4031
commit 4b97fcb76d
2 changed files with 25 additions and 25 deletions
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46
README.md
View file

@ -43,32 +43,32 @@ Check out the [contribution guide](CONTRIBUTING.md)
## User Mode Integer Tests
| **Test Name** | **P/V** | **Test Name** | **P/V** | **Test Name** | **P/V** |
|---------------|--------------------|---------------|--------------------|---------------|--------------------|
| add | :white_check_mark: | lb | :white_check_mark: | sll | :white_check_mark: |
| addi | :white_check_mark: | lbu | :white_check_mark: | slli | :white_check_mark: |
| addiw | :white_check_mark: | ld | :white_check_mark: | slliw | :white_check_mark: |
| addw | :white_check_mark: | lh | :white_check_mark: | sllw | :white_check_mark: |
| and | :white_check_mark: | lhu | :white_check_mark: | slt | :white_check_mark: |
| andi | :white_check_mark: | lui | :white_check_mark: | slti | :white_check_mark: |
| auipc | :white_check_mark: | lw | :white_check_mark: | sltiu | :white_check_mark: |
| beq | :white_check_mark: | lwu | :white_check_mark: | sltu | :white_check_mark: |
| bge | :white_check_mark: | or | :white_check_mark: | sra | :white_check_mark: |
| bgeu | :white_check_mark: | ori | :white_check_mark: | srai | :white_check_mark: |
| blt | :white_check_mark: | sb | :white_check_mark: | sraiw | :white_check_mark: |
| bltu | :white_check_mark: | sd | :white_check_mark: | sraw | :white_check_mark: |
| bne | :white_check_mark: | sh | :white_check_mark: | srl | :white_check_mark: :white_check_mark:|
| sub | :white_check_mark: | simple | :white_check_mark: | srli | :white_check_mark: |
| subw | :white_check_mark: | jal | :white_check_mark: | srliw | :white_check_mark: |
| sw | :white_check_mark: | jalr | :white_check_mark: | srlw | :white_check_mark: |
| xor | :white_check_mark: | | | | |
| xori | :white_check_mark: | | | | |
| **Test Name** | **P/V** | **Test Name** | **P/V** | **Test Name** | **P/V** |
|---------------|-----------------------------------------|---------------|----------------------------------------|---------------|-----------------------------------------|
| add | :white_check_mark: :white_large_square: | lb | :white_check_mark::white_large_square: | sll | :white_check_mark: :white_check_mark: |
| addi | :white_check_mark: :white_large_square: | lbu | :white_check_mark::white_large_square: | slli | :white_check_mark: :white_large_square: |
| addiw | :white_check_mark: :white_large_square: | ld | :white_check_mark::white_large_square: | slliw | :white_check_mark: :white_large_square: |
| addw | :white_check_mark: :white_large_square: | lh | :white_check_mark::white_large_square: | sllw | :white_check_mark: :white_large_square: |
| and | :white_check_mark: :white_large_square: | lhu | :white_check_mark::white_large_square: | slt | :white_check_mark: :white_large_square: |
| andi | :white_check_mark: :white_large_square: | lui | :white_check_mark::white_large_square: | slti | :white_check_mark: :white_large_square: |
| auipc | :white_check_mark: :white_large_square: | lw | :white_check_mark::white_large_square: | sltiu | :white_check_mark: :white_large_square: |
| beq | :white_check_mark: :white_large_square: | lwu | :white_check_mark::white_large_square: | sltu | :white_check_mark: :white_large_square: |
| bge | :white_check_mark: :white_large_square: | or | :white_check_mark::white_large_square: | sra | :white_check_mark: :white_large_square: |
| bgeu | :white_check_mark: :white_large_square: | ori | :white_check_mark::white_large_square: | srai | :white_check_mark: :white_large_square: |
| blt | :white_check_mark: :white_large_square: | sb | :white_check_mark::white_large_square: | sraiw | :white_check_mark: :white_large_square: |
| bltu | :white_check_mark: :white_large_square: | sd | :white_check_mark::white_check_mark: | sraw | :white_check_mark: :white_large_square: |
| bne | :white_check_mark: :white_large_square: | sh | :white_check_mark::white_large_square: | srl | :white_check_mark: :white_check_mark: |
| sub | :white_check_mark: :white_large_square: | simple | :white_check_mark::white_large_square: | srli | :white_check_mark: :white_large_square: |
| subw | :white_check_mark: :white_large_square: | jal | :white_check_mark::white_large_square: | srliw | :white_check_mark: :white_large_square: |
| sw | :white_check_mark: :white_large_square: | jalr | :white_check_mark::white_large_square: | srlw | :white_check_mark: :white_large_square: |
| xor | :white_check_mark: :white_large_square: | | | | |
| xori | :white_check_mark: :white_large_square: | | | | |
## Compressed Instruction Tests
| **Test Name** | **P/V** | **Test Name** | **P/V** | **Test Name** | **P/V** |
|---------------|--------------------|---------------|---------|---------------|---------|
| rvc | :white_check_mark: | | | | |
| **Test Name** | **P/V** | **Test Name** | **P/V** | **Test Name** | **P/V** |
|---------------|----------------------------------------|---------------|---------|---------------|---------|
| rvc | :white_check_mark::white_large_square: | | | | |
## Machine Mode Tests

4
tb/core_tb.sv
View file

@ -171,7 +171,7 @@ module core_tb;
string file;
string test;
// offset the temporary RAM
logic [7:0] rmem [`DRAM_BASE:`DRAM_BASE + 16384];
logic [7:0] rmem [`DRAM_BASE:`DRAM_BASE + 32768];
// get the file name from a command line plus arg
void'(uvcl.get_arg_value("+ASMTEST=",file));
@ -183,7 +183,7 @@ module core_tb;
// get the objdump verilog file to load our memorys
$readmemh({file, ".v"}, rmem);
// copy bitwise from verilog file
for (int i = 0; i < 16384/8; i++) begin
for (int i = 0; i < 32768/8; i++) begin
for (int j = 0; j < 8; j++)
core_mem_i.ram_i.mem[i][j] = rmem[`DRAM_BASE + i*8 + j];
end