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Merge 19d73dc5d7 into 733743da0f

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Eric Ackermann 2025-04-22 09:41:26 +00:00 • committed by GitHub
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2 changed files with 15 additions and 2 deletions
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6
core/commit_stage.sv
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@ -113,10 +113,12 @@ module commit_stage
always_comb begin : dirty_fp_state
dirty_fp_state_o = 1'b0;
for (int i = 0; i < CVA6Cfg.NrCommitPorts; i++) begin
dirty_fp_state_o |= commit_ack_o[i] & (commit_instr_i[i].fu inside {FPU, FPU_VEC} || (CVA6Cfg.FpPresent && ariane_pkg::is_rd_fpr(
dirty_fp_state_o |= commit_ack_o[i] & ((commit_instr_i[i].fu inside {FPU, FPU_VEC} & CVA6Cfg.FpPresent & ariane_pkg::fd_changes_rd_state(
commit_instr_i[i].op
)) || (CVA6Cfg.FpPresent && ariane_pkg::is_rd_fpr(
commit_instr_i[i].op
// Check if we issued a vector floating-point instruction to the accellerator
))) | commit_instr_i[i].fu == ACCEL && commit_instr_i[i].vfp;
))) | (commit_instr_i[i].fu == ACCEL && commit_instr_i[i].vfp);
end
end

11
core/include/ariane_pkg.sv
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@ -574,6 +574,17 @@ package ariane_pkg;
endcase
endfunction
function automatic logic fd_changes_rd_state(input fu_op op);
unique case (op) inside
FSD, FSW, FSH, FSB, // stores
FCVT_F2I, // conversion to int
FMV_F2X, // move as-is to int
FCLASS: // classification (writes output to integer register)
return 1'b0; // floating-point registers are only read
default: return 1'b1; // other ops - floating-point registers are written as well
endcase
endfunction
function automatic logic is_amo(fu_op op);
case (op) inside
[AMO_LRW : AMO_MINDU]: begin