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Revert "csr_regfile: Fix S-mode traps when H extension is enabled (#2587)" (#2594)
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This reverts commit 485c382b23.
This commit is contained in:
JeanRochCoulon 2024-11-12 10:41:03 +01:00 • committed by GitHub
parent 485c382b23
commit 5bc34d73a9
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1 changed files with 19 additions and 17 deletions
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36
core/csr_regfile.sv
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@ -1829,23 +1829,25 @@ module csr_regfile
// trap to supervisor mode
if (CVA6Cfg.RVS && trap_to_priv_lvl == riscv::PRIV_LVL_S) begin
if (CVA6Cfg.RVH && trap_to_v) begin
// update sstatus
vsstatus_d.sie = 1'b0;
vsstatus_d.spie = vsstatus_q.sie;
// this can either be user or supervisor mode
vsstatus_d.spp = priv_lvl_q[0];
// set cause
vscause_d = ex_i.cause[CVA6Cfg.XLEN-1] ? {ex_i.cause[CVA6Cfg.XLEN-1:2], 2'b01} : ex_i.cause;
// set epc
vsepc_d = {{CVA6Cfg.XLEN - CVA6Cfg.VLEN{pc_i[CVA6Cfg.VLEN-1]}}, pc_i};
// set vstval
vstval_d = (ariane_pkg::ZERO_TVAL
&& (ex_i.cause inside {
riscv::ILLEGAL_INSTR,
riscv::BREAKPOINT,
riscv::ENV_CALL_UMODE
} || ex_i.cause[CVA6Cfg.XLEN-1])) ? '0 : ex_i.tval;
if (CVA6Cfg.RVH) begin
if (trap_to_v) begin
// update sstatus
vsstatus_d.sie = 1'b0;
vsstatus_d.spie = vsstatus_q.sie;
// this can either be user or supervisor mode
vsstatus_d.spp = priv_lvl_q[0];
// set cause
vscause_d = ex_i.cause[CVA6Cfg.XLEN-1] ? {ex_i.cause[CVA6Cfg.XLEN-1:2], 2'b01} : ex_i.cause;
// set epc
vsepc_d = {{CVA6Cfg.XLEN - CVA6Cfg.VLEN{pc_i[CVA6Cfg.VLEN-1]}}, pc_i};
// set vstval
vstval_d = (ariane_pkg::ZERO_TVAL
&& (ex_i.cause inside {
riscv::ILLEGAL_INSTR,
riscv::BREAKPOINT,
riscv::ENV_CALL_UMODE
} || ex_i.cause[CVA6Cfg.XLEN-1])) ? '0 : ex_i.tval;
end
end else begin
// update sstatus
mstatus_d.sie = 1'b0;