mirror of
https://github.com/openhwgroup/cva6.git
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ISA functional coverage : Add directed tests (#1855)
This commit is contained in:
Jalali
GitHub
parent
cedc21bb35
commit
5dd04829e3
6 changed files with 675 additions and 189 deletions
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@ -137,6 +137,6 @@ done
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j=0
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elif [[ "$list_num" = 0 ]];then
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printf "==== Execute Directed tests to improve functional coverage of isa, by hitting corners !!! ====\n\n"
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python3 cva6.py --testlist=$DIRECTED_TESTLIST --iss_yaml cva6.yaml --target $DV_TARGET --iss=vcs-uvm,spike --priv=m
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python3 cva6.py --testlist=$DIRECTED_TESTLIST --iss_yaml cva6.yaml --isa_extension="zcb" --target $DV_TARGET --iss=vcs-uvm,spike --priv=m
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fi
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cd -
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@ -465,145 +465,231 @@ plan "CVA6 Verification Master Plan";
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feature RV32ZCB;
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weight = 1;
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description = "ZCB extension";
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measure Group C_MUL;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_mul_cg";
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endmeasure
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measure Group C_ZEXT_B;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_zext_b_cg";
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endmeasure
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measure Group C_SEXT_B;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_sext_b_cg";
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endmeasure
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measure Group C_ZEXT_H;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_zext_h_cg";
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endmeasure
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measure Group C_SEXT_H;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_sext_h_cg";
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endmeasure
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measure Group C_NOT;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_not_cg";
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endmeasure
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measure Group C_SB;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_sb_cg";
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endmeasure
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measure Group C_LHU;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_lhu_cg";
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endmeasure
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measure Group C_LH;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_lh_cg";
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endmeasure
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measure Group C_LBU;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_lbu_cg";
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endmeasure
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measure Group C_SH;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_sh_cg";
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endmeasure
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feature MUL;
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measure Group MUL;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_mul_cg";
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endmeasure
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endfeature
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feature ZEXT_B;
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measure Group ZEXT_B;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_zext_b_cg";
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endmeasure
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endfeature
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feature ZEXT_H;
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measure Group ZEXT_H;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_zext_h_cg";
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endmeasure
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endfeature
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feature SEXT_B;
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measure Group SEXT_B;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_sext_b_cg";
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endmeasure
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endfeature
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feature SEXT_H;
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measure Group SEXT_H;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_sext_h_cg";
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endmeasure
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endfeature
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feature NOT;
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measure Group NOT;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_not_cg";
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endmeasure
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endfeature
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feature SB;
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measure Group SB;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_sb_cg";
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endmeasure
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endfeature
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feature SH;
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measure Group SH;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_sh_cg";
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endmeasure
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endfeature
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feature LBU;
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measure Group LBU;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_lbu_cg";
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endmeasure
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endfeature
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feature LHU;
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measure Group LHU;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_lhu_cg";
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endmeasure
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endfeature
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feature LH;
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measure Group LH;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zcb_lh_cg";
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endmeasure
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endfeature
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endfeature
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feature RV32ZB;
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description = "Bitmanip extension";
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feature RV32ZBA;
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measure Group SH1ADD;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zba_sh1add_cg";
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endmeasure
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measure Group SH2ADD;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zba_sh2add_cg";
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endmeasure
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measure Group SH3ADD;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zba_sh3add_cg";
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endmeasure
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feature SH1ADD;
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measure Group SH1ADD;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zba_sh1add_cg";
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endmeasure
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endfeature
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feature SH2ADD;
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measure Group SH2ADD;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zba_sh2add_cg";
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endmeasure
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endfeature
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feature SH3ADD;
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measure Group SH3ADD;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zba_sh3add_cg";
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endmeasure
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endfeature
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endfeature
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feature RV32ZBB;
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measure Group ANDN;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_andn_cg";
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endmeasure
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measure Group CLZ;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_clz_cg";
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endmeasure
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measure Group CPOP;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_cpop_cg";
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endmeasure
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measure Group CTZ;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_ctz_cg";
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endmeasure
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measure Group MAX;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_max_cg";
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endmeasure
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measure Group MAXU;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_maxu_cg";
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endmeasure
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measure Group MIN;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_min_cg";
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endmeasure
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measure Group MINU;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_minu_cg";
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endmeasure
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measure Group ORC_B;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_orc_b_cg";
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endmeasure
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measure Group ORN;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_orn_cg";
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endmeasure
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measure Group REV8;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_rev8_cg";
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endmeasure
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measure Group ROL;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_rol_cg";
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endmeasure
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measure Group ROR;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_ror_cg";
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endmeasure
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measure Group RORI;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_rori_cg";
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endmeasure
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measure Group SEXT_B;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_sext_b_cg";
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endmeasure
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measure Group SEXT_H;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_sext_h_cg";
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endmeasure
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measure Group XNOR;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_xnor_cg";
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endmeasure
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measure Group ZEXT_H;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_zext_h_cg";
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endmeasure
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feature ANDN;
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measure Group ANDN;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_andn_cg";
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endmeasure
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endfeature
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feature MAX;
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measure Group MAX;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_max_cg";
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endmeasure
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endfeature
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feature MAXU;
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measure Group MAXU;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_maxu_cg";
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endmeasure
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endfeature
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feature MIN;
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measure Group MIN;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_min_cg";
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endmeasure
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endfeature
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feature MINU;
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measure Group MINU;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_minu_cg";
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endmeasure
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endfeature
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feature ORN;
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measure Group ORN;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_orn_cg";
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endmeasure
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endfeature
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feature ROL;
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measure Group ROL;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_rol_cg";
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endmeasure
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endfeature
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feature ROR;
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measure Group ROR;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_ror_cg";
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endmeasure
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endfeature
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feature XNOR;
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measure Group XNOR;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_xnor_cg";
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endmeasure
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endfeature
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feature RORI;
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measure Group RORI;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_rori_cg";
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endmeasure
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endfeature
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feature CLZ;
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measure Group CLZ;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_clz_cg";
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endmeasure
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endfeature
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feature CPOP;
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measure Group CPOP;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_cpop_cg";
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endmeasure
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endfeature
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feature CTZ;
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measure Group CTZ;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_ctz_cg";
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endmeasure
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endfeature
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feature ORC_B;
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measure Group ORC_B;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_orc_b_cg";
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endmeasure
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endfeature
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feature REV8;
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measure Group REV8;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_rev8_cg";
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endmeasure
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endfeature
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feature SEXT_B;
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measure Group SEXT_B;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_sext_b_cg";
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endmeasure
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endfeature
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feature SEXT_H;
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measure Group SEXT_H;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_sext_h_cg";
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endmeasure
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endfeature
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feature ZEXT_H;
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measure Group ZEXT_H;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbb_zext_h_cg";
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endmeasure
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endfeature
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endfeature
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feature RV32ZBC;
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measure Group CLMUL;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbc_clmul_cg";
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endmeasure
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measure Group CLMULH;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbc_clmulh_cg";
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endmeasure
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measure Group CLMULR;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbc_clmulr_cg";
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endmeasure
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feature CLMUL;
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measure Group CLMUL;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbc_clmul_cg";
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endmeasure
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endfeature
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feature CLMULH;
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measure Group CLMULH;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbc_clmulh_cg";
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endmeasure
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endfeature
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feature CLMULR;
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measure Group CLMULR;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbc_clmulr_cg";
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endmeasure
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endfeature
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endfeature
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feature RV32ZBS;
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measure Group BCLR;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbs_bclr_cg";
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endmeasure
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measure Group BCLRI;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbs_bclri_cg";
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endmeasure
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measure Group BEXT;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbs_bext_cg";
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endmeasure
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measure Group BEXTI;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbs_bexti_cg";
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endmeasure
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measure Group BINV;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbs_binv_cg";
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endmeasure
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measure Group BINVI;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbs_binvi_cg";
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endmeasure
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measure Group BSET;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbs_bset_cg";
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endmeasure
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measure Group BSETI;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbs_bseti_cg";
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endmeasure
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feature BCLR;
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measure Group BCLR;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbs_bclr_cg";
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endmeasure
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endfeature
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feature BCLRI;
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measure Group BCLRI;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbs_bclri_cg";
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endmeasure
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endfeature
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feature BINV;
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measure Group BINV;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbs_binv_cg";
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endmeasure
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endfeature
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feature BINVI;
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measure Group BINVI;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbs_binvi_cg";
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endmeasure
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endfeature
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feature BSET;
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measure Group BSET;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbs_bset_cg";
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endmeasure
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endfeature
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feature BSETI;
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measure Group BSETI;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbs_bseti_cg";
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endmeasure
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endfeature
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feature BEXT;
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measure Group BEXT;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbs_bext_cg";
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endmeasure
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endfeature
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feature BEXTI;
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measure Group BEXTI;
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source = "group instance: uvma_isacov_pkg.uvma_isacov_pkg.rv32zbs_bexti_cg";
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endmeasure
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||||
endfeature
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endfeature
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endfeature
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feature "Instructions execution sequences";
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@ -615,18 +701,26 @@ plan "CVA6 Verification Master Plan";
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feature "Illegal instructions";
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weight = 1;
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Comment = "RVFI limitation issue(#1338)";
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measure Group ILLEGAL_I_EXT;
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source = "group instance: uvme_cva6_pkg.uvme_cva6_pkg.illegal_i_cg";
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endmeasure
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measure Group ILLEGAL_ZICSR_EXT;
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source = "group instance: uvme_cva6_pkg.uvme_cva6_pkg.illegal_zicsr_cg";
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endmeasure
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measure Group ILLEGAL_ZIFENCEI_EXT;
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source = "group instance: uvme_cva6_pkg.uvme_cva6_pkg.illegal_zifencei_cg";
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endmeasure
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measure Group ILLEGAL_M_EXT;
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source = "group instance: uvme_cva6_pkg.uvme_cva6_pkg.illegal_m_cg";
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endmeasure
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feature I_EXT;
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measure Group I_EXT;
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source = "group instance: uvme_cva6_pkg.uvme_cva6_pkg.illegal_i_cg";
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endmeasure
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endfeature
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feature M_EXT;
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measure Group M_EXT;
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source = "group instance: uvme_cva6_pkg.uvme_cva6_pkg.illegal_m_cg";
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endmeasure
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endfeature
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feature ZICSR_EXT;
|
||||
measure Group ZICSR_EXT;
|
||||
source = "group instance: uvme_cva6_pkg.uvme_cva6_pkg.illegal_zicsr_cg";
|
||||
endmeasure
|
||||
endfeature
|
||||
feature ZIFENCEI_EXT;
|
||||
measure Group ZIFENCEI_EXT;
|
||||
source = "group instance: uvme_cva6_pkg.uvme_cva6_pkg.illegal_zifencei_cg";
|
||||
endmeasure
|
||||
endfeature
|
||||
endfeature
|
||||
endfeature
|
||||
feature "CSR access";
|
||||
|
|
@ -1311,18 +1405,6 @@ plan "CVA6 Verification Master Plan";
|
|||
measure Group PMP;
|
||||
endmeasure
|
||||
endfeature
|
||||
feature MMU;
|
||||
weight = 0;
|
||||
description = "Memory Management Unit support.\nNot applicable for CVA6 Embedded configuration.";
|
||||
measure Group MMU;
|
||||
endmeasure
|
||||
endfeature
|
||||
feature "Privilege modes";
|
||||
weight = 0;
|
||||
description = "Support machine, supervisor, user and debug privilege modes.\nNot applicable for CVA6 Embedded configuration.";
|
||||
measure Group privileges;
|
||||
endmeasure
|
||||
endfeature
|
||||
endfeature
|
||||
feature "Design level";
|
||||
description = "CVA6 features for design";
|
||||
|
|
|
|||
|
|
@ -49,18 +49,26 @@ branch5:
|
|||
remu t4, tp, a1
|
||||
c.andi a5, -1
|
||||
lui zero, 0
|
||||
# (example of) final self-check test
|
||||
li a0, 0xCAFE;
|
||||
li a1, 0xCAFE;
|
||||
xor a2, a0, a1;
|
||||
beqz a2, pass;
|
||||
beq zero, zero, branch_to
|
||||
branch_to:
|
||||
bne zero, zero, main
|
||||
blt zero, zero, main
|
||||
sub a5, zero, a0
|
||||
bge a5, zero, main
|
||||
|
||||
fail:
|
||||
# Failure post-processing (messages, ecall setup etc.)
|
||||
li a0, 0x0;
|
||||
jal exit;
|
||||
#End of test
|
||||
j test_pass
|
||||
|
||||
pass:
|
||||
# Success post-processing (messages, ecall setup etc.)
|
||||
li a0, 0x0;
|
||||
jal exit;
|
||||
test_pass:
|
||||
li ra, 0
|
||||
slli ra, ra, 1
|
||||
addi ra, ra, 1
|
||||
sw ra, tohost, t5
|
||||
self_loop: j self_loop
|
||||
|
||||
test_fail:
|
||||
li ra, 1
|
||||
slli ra, ra, 1
|
||||
addi ra, ra, 1
|
||||
sw ra, tohost, t5
|
||||
self_loop_2: j self_loop_2
|
||||
|
|
|
|||
337
verif/tests/custom/isacov/isa_test.S
Normal file
337
verif/tests/custom/isacov/isa_test.S
Normal file
|
|
@ -0,0 +1,337 @@
|
|||
# Copyright 2024 Thales DIS SAS
|
||||
#
|
||||
# Licensed under the Solderpad Hardware Licence, Version 2.0 (the "License");
|
||||
# you may not use this file except in compliance with the License.
|
||||
# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.0
|
||||
# You may obtain a copy of the License at https://solderpad.org/licenses/
|
||||
#
|
||||
# Original Author: Ayoub JALALI (ayoub.jalali@external.thalesgroup.com)
|
||||
|
||||
#*****************************************************************************
|
||||
# isa_test.S
|
||||
#-----------------------------------------------------------------------------
|
||||
#
|
||||
|
||||
.globl main
|
||||
main:
|
||||
# core of the test
|
||||
|
||||
slli zero, zero, 0
|
||||
slli ra, ra, 0
|
||||
slli sp, sp, 0
|
||||
slli gp, gp, 0
|
||||
slli tp, tp, 0
|
||||
slli t0, t0, 0
|
||||
slli t1, t1, 0
|
||||
slli t2, t2, 0
|
||||
slli s0, s0, 0
|
||||
slli s1, s1, 0
|
||||
slli a0, a0, 0
|
||||
slli a1, a1, 0
|
||||
slli a2, a2, 0
|
||||
slli a3, a3, 0
|
||||
slli a4, a4, 0
|
||||
slli a5, a5, 0
|
||||
slli a6, a6, 0
|
||||
slli a7, a7, 0
|
||||
slli s2, s2, 0
|
||||
slli s3, s3, 0
|
||||
slli s4, s4, 0
|
||||
slli s5, s5, 0
|
||||
slli s6, s6, 0
|
||||
slli s7, s7, 0
|
||||
slli s8, s8, 0
|
||||
slli s9, s9, 0
|
||||
slli s10, s10, 0
|
||||
slli s11, s11, 0
|
||||
slli t3, t3, 0
|
||||
slli t4, t4, 0
|
||||
slli t5, t5, 0
|
||||
slli t6, t6, 0
|
||||
|
||||
slti zero, zero, 0
|
||||
slti ra, ra, 0
|
||||
slti sp, sp, 0
|
||||
slti gp, gp, 0
|
||||
slti tp, tp, 0
|
||||
slti t0, t0, 0
|
||||
slti t1, t1, 0
|
||||
slti t2, t2, 0
|
||||
slti s0, s0, 0
|
||||
slti s1, s1, 0
|
||||
slti a0, a0, 0
|
||||
slti a1, a1, 0
|
||||
slti a2, a2, 0
|
||||
slti a3, a3, 0
|
||||
slti a4, a4, 0
|
||||
slti a5, a5, 0
|
||||
slti a6, a6, 0
|
||||
slti a7, a7, 0
|
||||
slti s2, s2, 0
|
||||
slti s3, s3, 0
|
||||
slti s4, s4, 0
|
||||
slti s5, s5, 0
|
||||
slti s6, s6, 0
|
||||
slti s7, s7, 0
|
||||
slti s8, s8, 0
|
||||
slti s9, s9, 0
|
||||
slti s10, s10, 0
|
||||
slti s11, s11, 0
|
||||
slti t3, t3, 0
|
||||
slti t4, t4, 0
|
||||
slti t5, t5, 0
|
||||
slti t6, t6, 0
|
||||
|
||||
sltiu zero, zero, 0
|
||||
sltiu ra, ra, 0
|
||||
sltiu sp, sp, 0
|
||||
sltiu gp, gp, 0
|
||||
sltiu tp, tp, 0
|
||||
sltiu t0, t0, 0
|
||||
sltiu t1, t1, 0
|
||||
sltiu t2, t2, 0
|
||||
sltiu s0, s0, 0
|
||||
sltiu s1, s1, 0
|
||||
sltiu a0, a0, 0
|
||||
sltiu a1, a1, 0
|
||||
sltiu a2, a2, 0
|
||||
sltiu a3, a3, 0
|
||||
sltiu a4, a4, 0
|
||||
sltiu a5, a5, 0
|
||||
sltiu a6, a6, 0
|
||||
sltiu a7, a7, 0
|
||||
sltiu s2, s2, 0
|
||||
sltiu s3, s3, 0
|
||||
sltiu s4, s4, 0
|
||||
sltiu s5, s5, 0
|
||||
sltiu s6, s6, 0
|
||||
sltiu s7, s7, 0
|
||||
sltiu s8, s8, 0
|
||||
sltiu s9, s9, 0
|
||||
sltiu s10, s10, 0
|
||||
sltiu s11, s11, 0
|
||||
sltiu t3, t3, 0
|
||||
sltiu t4, t4, 0
|
||||
sltiu t5, t5, 0
|
||||
sltiu t6, t6, 0
|
||||
|
||||
sltu zero, zero, zero
|
||||
|
||||
srai zero, zero, 0
|
||||
srai ra, ra, 0
|
||||
srai sp, sp, 0
|
||||
srai gp, gp, 0
|
||||
srai tp, tp, 0
|
||||
srai t0, t0, 0
|
||||
srai t1, t1, 0
|
||||
srai t2, t2, 0
|
||||
srai s0, s0, 0
|
||||
srai s1, s1, 0
|
||||
srai a0, a0, 0
|
||||
srai a1, a1, 0
|
||||
srai a2, a2, 0
|
||||
srai a3, a3, 0
|
||||
srai a4, a4, 0
|
||||
srai a5, a5, 0
|
||||
srai a6, a6, 0
|
||||
srai a7, a7, 0
|
||||
srai s2, s2, 0
|
||||
srai s3, s3, 0
|
||||
srai s4, s4, 0
|
||||
srai s5, s5, 0
|
||||
srai s6, s6, 0
|
||||
srai s7, s7, 0
|
||||
srai s8, s8, 0
|
||||
srai s9, s9, 0
|
||||
srai s10, s10, 0
|
||||
srai s11, s11, 0
|
||||
srai t3, t3, 0
|
||||
srai t4, t4, 0
|
||||
srai t5, t5, 0
|
||||
srai t6, t6, 0
|
||||
|
||||
srli zero, zero, 0
|
||||
srli ra, ra, 0
|
||||
srli sp, sp, 0
|
||||
srli gp, gp, 0
|
||||
srli tp, tp, 0
|
||||
srli t0, t0, 0
|
||||
srli t1, t1, 0
|
||||
srli t2, t2, 0
|
||||
srli s0, s0, 0
|
||||
srli s1, s1, 0
|
||||
srli a0, a0, 0
|
||||
srli a1, a1, 0
|
||||
srli a2, a2, 0
|
||||
srli a3, a3, 0
|
||||
srli a4, a4, 0
|
||||
srli a5, a5, 0
|
||||
srli a6, a6, 0
|
||||
srli a7, a7, 0
|
||||
srli s2, s2, 0
|
||||
srli s3, s3, 0
|
||||
srli s4, s4, 0
|
||||
srli s5, s5, 0
|
||||
srli s6, s6, 0
|
||||
srli s7, s7, 0
|
||||
srli s8, s8, 0
|
||||
srli s9, s9, 0
|
||||
srli s10, s10, 0
|
||||
srli s11, s11, 0
|
||||
srli t3, t3, 0
|
||||
srli t4, t4, 0
|
||||
srli t5, t5, 0
|
||||
srli t6, t6, 0
|
||||
|
||||
csrrw zero, mscratch, zero
|
||||
csrrw ra, mscratch, ra
|
||||
csrrw sp, mscratch, sp
|
||||
csrrw gp, mscratch, gp
|
||||
csrrw tp, mscratch, tp
|
||||
csrrw t0, mscratch, t0
|
||||
csrrw t1, mscratch, t1
|
||||
csrrw t2, mscratch, t2
|
||||
csrrw s0, mscratch, s0
|
||||
csrrw s1, mscratch, s1
|
||||
csrrw a0, mscratch, a0
|
||||
csrrw a1, mscratch, a1
|
||||
csrrw a2, mscratch, a2
|
||||
csrrw a3, mscratch, a3
|
||||
csrrw a4, mscratch, a4
|
||||
csrrw a5, mscratch, a5
|
||||
csrrw a6, mscratch, a6
|
||||
csrrw a7, mscratch, a7
|
||||
csrrw s2, mscratch, s2
|
||||
csrrw s3, mscratch, s3
|
||||
csrrw s4, mscratch, s4
|
||||
csrrw s5, mscratch, s5
|
||||
csrrw s6, mscratch, s6
|
||||
csrrw s7, mscratch, s7
|
||||
csrrw s8, mscratch, s8
|
||||
csrrw s9, mscratch, s9
|
||||
csrrw s10, mscratch, s10
|
||||
csrrw s11, mscratch, s11
|
||||
csrrw t3, mscratch, t3
|
||||
csrrw t4, mscratch, t4
|
||||
csrrw t5, mscratch, t5
|
||||
csrrw t6, mscratch, t6
|
||||
|
||||
csrrs zero, mscratch, zero
|
||||
csrrs ra, mscratch, ra
|
||||
csrrs sp, mscratch, sp
|
||||
csrrs gp, mscratch, gp
|
||||
csrrs tp, mscratch, tp
|
||||
csrrs t0, mscratch, t0
|
||||
csrrs t1, mscratch, t1
|
||||
csrrs t2, mscratch, t2
|
||||
csrrs s0, mscratch, s0
|
||||
csrrs s1, mscratch, s1
|
||||
csrrs a0, mscratch, a0
|
||||
csrrs a1, mscratch, a1
|
||||
csrrs a2, mscratch, a2
|
||||
csrrs a3, mscratch, a3
|
||||
csrrs a4, mscratch, a4
|
||||
csrrs a5, mscratch, a5
|
||||
csrrs a6, mscratch, a6
|
||||
csrrs a7, mscratch, a7
|
||||
csrrs s2, mscratch, s2
|
||||
csrrs s3, mscratch, s3
|
||||
csrrs s4, mscratch, s4
|
||||
csrrs s5, mscratch, s5
|
||||
csrrs s6, mscratch, s6
|
||||
csrrs s7, mscratch, s7
|
||||
csrrs s8, mscratch, s8
|
||||
csrrs s9, mscratch, s9
|
||||
csrrs s10, mscratch, s10
|
||||
csrrs s11, mscratch, s11
|
||||
csrrs t3, mscratch, t3
|
||||
csrrs t4, mscratch, t4
|
||||
csrrs t5, mscratch, t5
|
||||
csrrs t6, mscratch, t6
|
||||
|
||||
csrrc zero, mscratch, zero
|
||||
csrrc ra, mscratch, ra
|
||||
csrrc sp, mscratch, sp
|
||||
csrrc gp, mscratch, gp
|
||||
csrrc tp, mscratch, tp
|
||||
csrrc t0, mscratch, t0
|
||||
csrrc t1, mscratch, t1
|
||||
csrrc t2, mscratch, t2
|
||||
csrrc s0, mscratch, s0
|
||||
csrrc s1, mscratch, s1
|
||||
csrrc a0, mscratch, a0
|
||||
csrrc a1, mscratch, a1
|
||||
csrrc a2, mscratch, a2
|
||||
csrrc a3, mscratch, a3
|
||||
csrrc a4, mscratch, a4
|
||||
csrrc a5, mscratch, a5
|
||||
csrrc a6, mscratch, a6
|
||||
csrrc a7, mscratch, a7
|
||||
csrrc s2, mscratch, s2
|
||||
csrrc s3, mscratch, s3
|
||||
csrrc s4, mscratch, s4
|
||||
csrrc s5, mscratch, s5
|
||||
csrrc s6, mscratch, s6
|
||||
csrrc s7, mscratch, s7
|
||||
csrrc s8, mscratch, s8
|
||||
csrrc s9, mscratch, s9
|
||||
csrrc s10, mscratch, s10
|
||||
csrrc s11, mscratch, s11
|
||||
csrrc t3, mscratch, t3
|
||||
csrrc t4, mscratch, t4
|
||||
csrrc t5, mscratch, t5
|
||||
csrrc t6, mscratch, t6
|
||||
|
||||
csrrwi zero, mscratch, 0
|
||||
csrrsi zero, mscratch, 0
|
||||
csrrci zero, mscratch, 0
|
||||
|
||||
add zero, zero, zero
|
||||
add ra, ra, zero
|
||||
add sp, sp, zero
|
||||
add gp, gp, zero
|
||||
add tp, tp, zero
|
||||
add t0, t0, zero
|
||||
add t1, t1, zero
|
||||
add t2, t2, zero
|
||||
add s0, s0, zero
|
||||
add s1, s1, zero
|
||||
add a0, a0, zero
|
||||
add a1, a1, zero
|
||||
add a2, a2, zero
|
||||
add a3, a3, zero
|
||||
add a4, a4, zero
|
||||
add a5, a5, zero
|
||||
add a6, a6, zero
|
||||
add a7, a7, zero
|
||||
add s2, s2, zero
|
||||
add s3, s3, zero
|
||||
add s4, s4, zero
|
||||
add s5, s5, zero
|
||||
add s6, s6, zero
|
||||
add s7, s7, zero
|
||||
add s8, s8, zero
|
||||
add s9, s9, zero
|
||||
add s10, s10, zero
|
||||
add s11, s11, zero
|
||||
add t3, t3, zero
|
||||
add t4, t4, zero
|
||||
add t5, t5, zero
|
||||
add t6, t6, zero
|
||||
|
||||
#End of test
|
||||
j test_pass
|
||||
|
||||
test_pass:
|
||||
li ra, 0
|
||||
slli ra, ra, 1
|
||||
addi ra, ra, 1
|
||||
sw ra, tohost, t5
|
||||
self_loop: j self_loop
|
||||
|
||||
test_fail:
|
||||
li ra, 1
|
||||
slli ra, ra, 1
|
||||
addi ra, ra, 1
|
||||
sw ra, tohost, t5
|
||||
self_loop_2: j self_loop_2
|
||||
|
|
@ -45,7 +45,7 @@ main:
|
|||
li t4, 0x80000000
|
||||
li t5, 0x80000000
|
||||
li t6, 0x80000000
|
||||
lw zero, -16(zero)
|
||||
|
||||
lw sp, 1024(sp)
|
||||
lw ra, 52(ra)
|
||||
lw gp, 52(gp)
|
||||
|
|
@ -108,7 +108,7 @@ main:
|
|||
li t4, 0x80000000
|
||||
li t5, 0x80000000
|
||||
li t6, 0x80000000
|
||||
lh zero, -16(zero)
|
||||
|
||||
lh sp, 1024(sp)
|
||||
lh ra, 52(ra)
|
||||
lh gp, 52(gp)
|
||||
|
|
@ -171,7 +171,7 @@ main:
|
|||
li t4, 0x80000000
|
||||
li t5, 0x80000000
|
||||
li t6, 0x80000000
|
||||
lb zero, -16(zero)
|
||||
|
||||
lb sp, 1024(sp)
|
||||
lb ra, 52(ra)
|
||||
lb gp, 52(gp)
|
||||
|
|
@ -234,7 +234,7 @@ main:
|
|||
li t4, 0x80000000
|
||||
li t5, 0x80000000
|
||||
li t6, 0x80000000
|
||||
lbu zero, -16(zero)
|
||||
|
||||
lbu sp, 1024(sp)
|
||||
lbu ra, 52(ra)
|
||||
lbu gp, 52(gp)
|
||||
|
|
@ -297,7 +297,7 @@ main:
|
|||
li t4, 0x80000000
|
||||
li t5, 0x80000000
|
||||
li t6, 0x80000000
|
||||
lhu zero, -16(zero)
|
||||
|
||||
lhu sp, 1024(sp)
|
||||
lhu ra, 52(ra)
|
||||
lhu gp, 52(gp)
|
||||
|
|
@ -329,21 +329,74 @@ main:
|
|||
lhu t4, 16(t4)
|
||||
lhu t5, 12(t5)
|
||||
lhu t6, 16(t6)
|
||||
add t0, s8, t0
|
||||
addi s8, t0, -420
|
||||
lui s8, 902640
|
||||
# (example of) final self-check test
|
||||
li a0, 0xCAFE;
|
||||
li a1, 0xCAFE;
|
||||
xor a2, a0, a1;
|
||||
beqz a2, pass;
|
||||
|
||||
fail:
|
||||
# Failure post-processing (messages, ecall setup etc.)
|
||||
li a0, 0x0;
|
||||
jal exit;
|
||||
li s0, 0x80000000
|
||||
li s1, 0x80000000
|
||||
li a0, 0x80000000
|
||||
li a1, 0x80000000
|
||||
li a2, 0x80000000
|
||||
li a3, 0x80000000
|
||||
li a4, 0x80000000
|
||||
li a5, 0x80000000
|
||||
|
||||
pass:
|
||||
# Success post-processing (messages, ecall setup etc.)
|
||||
li a0, 0x0;
|
||||
jal exit;
|
||||
c.lbu s0, 2(s0)
|
||||
c.lbu s1, 2(s1)
|
||||
c.lbu a0, 2(a0)
|
||||
c.lbu a1, 2(a1)
|
||||
c.lbu a2, 2(a2)
|
||||
c.lbu a3, 2(a3)
|
||||
c.lbu a4, 2(a4)
|
||||
c.lbu a5, 2(a5)
|
||||
|
||||
li s0, 0x80000000
|
||||
li s1, 0x80000000
|
||||
li a0, 0x80000000
|
||||
li a1, 0x80000000
|
||||
li a2, 0x80000000
|
||||
li a3, 0x80000000
|
||||
li a4, 0x80000000
|
||||
li a5, 0x80000000
|
||||
|
||||
c.lh s0, 0(s0)
|
||||
c.lh s1, 0(s1)
|
||||
c.lh a0, 0(a0)
|
||||
c.lh a1, 0(a1)
|
||||
c.lh a2, 0(a2)
|
||||
c.lh a3, 0(a3)
|
||||
c.lh a4, 0(a4)
|
||||
c.lh a5, 0(a5)
|
||||
|
||||
li s0, 0x80000000
|
||||
li s1, 0x80000000
|
||||
li a0, 0x80000000
|
||||
li a1, 0x80000000
|
||||
li a2, 0x80000000
|
||||
li a3, 0x80000000
|
||||
li a4, 0x80000000
|
||||
li a5, 0x80000000
|
||||
|
||||
c.lhu s0, 0(s0)
|
||||
c.lhu s1, 0(s1)
|
||||
c.lhu a0, 0(a0)
|
||||
c.lhu a1, 0(a1)
|
||||
c.lhu a2, 0(a2)
|
||||
c.lhu a3, 0(a3)
|
||||
c.lhu a4, 0(a4)
|
||||
c.lhu a5, 0(a5)
|
||||
|
||||
#End of test
|
||||
j test_pass
|
||||
|
||||
test_pass:
|
||||
li ra, 0
|
||||
slli ra, ra, 1
|
||||
addi ra, ra, 1
|
||||
sw ra, tohost, t5
|
||||
self_loop: j self_loop
|
||||
|
||||
test_fail:
|
||||
li ra, 1
|
||||
slli ra, ra, 1
|
||||
addi ra, ra, 1
|
||||
sw ra, tohost, t5
|
||||
self_loop_2: j self_loop_2
|
||||
|
|
|
|||
|
|
@ -32,7 +32,7 @@
|
|||
asm_tests: <path_var>/custom/isacov/branch_to_zero.S
|
||||
|
||||
- test: load_reg_hazard
|
||||
iterations: 0
|
||||
iterations: 1
|
||||
path_var: TESTS_PATH
|
||||
gcc_opts: "-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -I../tests/custom/env -I../tests/custom/common -T ../tests/custom/common/test.ld -lgcc"
|
||||
asm_tests: <path_var>/custom/isacov/load_reg_hazard.S
|
||||
|
|
@ -48,3 +48,9 @@
|
|||
path_var: TESTS_PATH
|
||||
gcc_opts: "-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -I../tests/custom/env -I../tests/custom/common -T ../tests/custom/common/test.ld -lgcc"
|
||||
asm_tests: <path_var>/custom/isacov/seq_hazard.S
|
||||
|
||||
- test: isa_test
|
||||
iterations: 1
|
||||
path_var: TESTS_PATH
|
||||
gcc_opts: "-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -I../tests/custom/env -I../tests/custom/common -T ../tests/custom/common/test.ld -lgcc"
|
||||
asm_tests: <path_var>/custom/isacov/isa_test.S
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue