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https://github.com/openhwgroup/cva6.git
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Set the environment configuration only from env_cfg constraints. (#2408)
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parent
776e0137b6
commit
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6 changed files with 11 additions and 53 deletions
2
verif/env/uvme/cov/uvme_cva6_config_covg.sv
vendored
2
verif/env/uvme/cov/uvme_cva6_config_covg.sv
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@ -214,7 +214,7 @@ endfunction : build_phase
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function void uvme_cva6_config_covg_c::sample_cva6_config();
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config_cg.sample(cfg.CVA6Cfg);
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config_cg.sample(RTLCVA6Cfg);
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boot_addr_cg.sample(cfg);
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clock_period_cg.sample(cfg.sys_clk_period);
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45
verif/env/uvme/uvme_cva6_cfg.sv
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45
verif/env/uvme/uvme_cva6_cfg.sv
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@ -59,9 +59,6 @@ class uvme_cva6_cfg_c extends uvma_core_cntrl_cfg_c;
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// MMU support
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rand bit MmuPresent;
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// Handle to RTL configuration
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rand cva6_cfg_t CVA6Cfg;
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`uvm_object_utils_begin(uvme_cva6_cfg_c)
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`uvm_field_int ( enabled , UVM_DEFAULT )
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`uvm_field_enum(uvm_active_passive_enum, is_active , UVM_DEFAULT )
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@ -99,40 +96,12 @@ class uvme_cva6_cfg_c extends uvma_core_cntrl_cfg_c;
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}
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constraint cva6_riscv_cons {
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xlen == CVA6Cfg.XLEN;
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ilen == 32;
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ext_i_supported == 1;
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ext_a_supported == CVA6Cfg.RVA;
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ext_m_supported == 1;
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ext_c_supported == CVA6Cfg.RVC;
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ext_p_supported == 0;
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ext_v_supported == CVA6Cfg.RVV;
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ext_f_supported == CVA6Cfg.RVF;
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ext_d_supported == CVA6Cfg.RVD;
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ext_zba_supported == CVA6Cfg.RVB;
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ext_zbb_supported == CVA6Cfg.RVB;
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ext_zbc_supported == CVA6Cfg.RVB;
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ext_zbe_supported == 0;
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ext_zbf_supported == 0;
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ext_zbm_supported == 0;
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ext_zbp_supported == 0;
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ext_zbr_supported == 0;
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ext_zbs_supported == CVA6Cfg.RVB;
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ext_zbt_supported == 0;
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ext_zifencei_supported == 1;
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ext_zicsr_supported == 1;
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ext_zicond_supported == CVA6Cfg.RVZiCond;
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ext_zcb_supported == CVA6Cfg.RVZCB;
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xlen == RTLCVA6Cfg.XLEN;
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ext_zihpm_supported == 0;
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ext_zicntr_supported == 0;
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ext_zicond_supported == RTLCVA6Cfg.RVZiCond;
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mode_s_supported == CVA6Cfg.RVS;
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mode_u_supported == CVA6Cfg.RVU;
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mode_h_supported == CVA6Cfg.RVH;
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pmp_supported == (CVA6Cfg.NrPMPEntries > 0);
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nr_pmp_entries == 64;
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debug_supported == CVA6Cfg.DebugEn;
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unaligned_access_supported == 0;
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unaligned_access_amo_supported == 0;
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@ -146,11 +115,9 @@ class uvme_cva6_cfg_c extends uvma_core_cntrl_cfg_c;
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dm_halt_addr_valid == 1;
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dm_exception_addr_valid == 1;
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nmi_addr_valid == 1;
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HPDCache_supported == 1;
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HPDCache_supported == (RTLCVA6Cfg.DCacheType == 2);
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DirectVecOnly == CVA6Cfg.DirectVecOnly;
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TvalEn == CVA6Cfg.TvalEn;
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MmuPresent == CVA6Cfg.MmuPresent;
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MmuPresent == RTLCVA6Cfg.MmuPresent;
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}
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constraint ext_const {
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@ -200,7 +167,7 @@ class uvme_cva6_cfg_c extends uvma_core_cntrl_cfg_c;
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isacov_cfg.seq_instr_x2_enabled == 1;
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isacov_cfg.reg_crosses_enabled == 0;
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isacov_cfg.reg_hazards_enabled == 1;
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rvfi_cfg.nret == CVA6Cfg.NrCommitPorts;
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rvfi_cfg.nret == RTLCVA6Cfg.NrCommitPorts;
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unified_traps == 0;
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axi_cfg.rand_channel_delay_enabled == 0;
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8
verif/env/uvme/uvme_cva6_env.sv
vendored
8
verif/env/uvme/uvme_cva6_env.sv
vendored
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@ -166,14 +166,6 @@ function void uvme_cva6_env_c::build_phase(uvm_phase phase);
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`uvm_info("CFG", $sformatf("Found configuration handle:\n%s", cfg.sprint()), UVM_DEBUG)
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end
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void'(uvm_config_db#(cva6_cfg_t)::get(this, "", "CVA6Cfg", cfg.CVA6Cfg));
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if (!cfg.CVA6Cfg) begin
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`uvm_fatal("CVA6Cfg", "RTL Configuration handle is null")
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end
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else begin
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`uvm_info("CVA6Cfg", $sformatf("Found RTL configuration handle:\n%p", cfg.CVA6Cfg), UVM_DEBUG)
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end
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cfg.rvfi_cfg.nret = cfg.CVA6Cfg.NrCommitPorts;
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if (cfg.enabled) begin
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2
verif/env/uvme/uvme_cva6_pkg.sv
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2
verif/env/uvme/uvme_cva6_pkg.sv
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@ -75,6 +75,8 @@ package uvme_cva6_pkg;
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bit [6:0] legal_i_funct7[$] = '{7'b0000000,
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7'b0100000};
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parameter config_pkg::cva6_cfg_t RTLCVA6Cfg = build_config_pkg::build_config(cva6_config_pkg::cva6_cfg);
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// Constants / Structs / Enums
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`include "uvme_cva6_constants.sv"
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`include "uvme_cva6_tdefs.sv"
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@ -19,14 +19,14 @@ function st_core_cntrl_cfg cva6pkg_to_core_cntrl_cfg(st_core_cntrl_cfg cfg);
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cfg.ext_a_supported = CVA6Cfg.RVA;
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cfg.ext_m_supported = 1;
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cfg.ext_c_supported = CVA6Cfg.RVC;
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cfg.ext_p_supported = 1;
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cfg.ext_p_supported = 0;
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cfg.ext_v_supported = CVA6Cfg.RVV;
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cfg.ext_f_supported = CVA6Cfg.RVF;
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cfg.ext_d_supported = CVA6Cfg.RVD;
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cfg.ext_zba_supported = CVA6Cfg.RVB;
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cfg.ext_zbb_supported = CVA6Cfg.RVB;
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cfg.ext_zbc_supported = CVA6Cfg.RVB;
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cfg.ext_zbe_supported = CVA6Cfg.RVB;
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cfg.ext_zbe_supported = 0;
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cfg.ext_zbf_supported = 0;
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cfg.ext_zbm_supported = 0;
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cfg.ext_zbp_supported = 0;
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@ -378,9 +378,6 @@ module uvmt_cva6_tb;
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uvm_config_db#(int)::set(.cntxt(null), .inst_name("*"), .field_name("ENV_PARAM_INSTR_DATA_WIDTH"), .value(ENV_PARAM_INSTR_DATA_WIDTH) );
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uvm_config_db#(int)::set(.cntxt(null), .inst_name("*"), .field_name("ENV_PARAM_RAM_ADDR_WIDTH"), .value(ENV_PARAM_RAM_ADDR_WIDTH) );
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// Set RTL parameters
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uvm_config_db#(config_pkg::cva6_cfg_t)::set(.cntxt(null), .inst_name("*.env"), .field_name("CVA6Cfg"), .value(CVA6Cfg) );
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// Run test
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uvm_top.enable_print_topology = 0; // ENV coders enable this as a debug aid
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uvm_top.finish_on_completion = 1;
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