docs: move riscv-isa-manual outside of cv32a65x documentation (#2264)

2025-04-24 22:27:10 -04:00 · 2024-06-16 23:20:41 +02:00 · 2024-06-16 23:20:41 +02:00 · 802066bfd3
commit 802066bfd3
parent 7e8e2c931f
54 changed files with 51 additions and 33 deletions
--- a/.gitmodules
+++ b/.gitmodules
@ -47,5 +47,5 @@
 	path = verif/sim/dv
 	url = https://github.com/google/riscv-dv.git
 [submodule "docs/06_cv32a65x_riscv/riscv-isa-manual"]
-	path = docs/04_cv32a65x/riscv/riscv-isa-manual
+	path = docs/riscv-isa/riscv-isa-manual
 	url = https://github.com/riscv/riscv-isa-manual.git
--- a/docs/04_cv32a65x/riscv/Makefile
+++ b/docs/04_cv32a65x/riscv/Makefile
@ -4,30 +4,7 @@
 #   SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
 #   You may obtain a copy of the License at https://solderpad.org/licenses/
 #
-#   Original Author: Jean-Roch COULON - Thales
+#   Original Author: Thales DIS
-all: priv-pdf priv-html unpriv-pdf unpriv-html
+CONFIG := cv32a65x
-
+include ../../riscv-isa/build.mk
 setup:
 	mkdir -p build/riscv-isa-manual
 	cp -r riscv-isa-manual/* build/riscv-isa-manual
 	cp -r src build/riscv-isa-manual
 priv-pdf: setup
 	cd build/riscv-isa-manual/build; make priv-pdf
 	cp ./build/riscv-isa-manual/build/riscv-privileged.pdf priv-isa-cv32a65x.pdf
 priv-html: setup
 	cd build/riscv-isa-manual/build; make priv-html
 	cp ./build/riscv-isa-manual/build/riscv-privileged.html priv-isa-cv32a65x.html
 unpriv-pdf: setup
 	cd build/riscv-isa-manual/build; make unpriv-pdf
 	cp ./build/riscv-isa-manual/build/riscv-unprivileged.pdf unpriv-isa-cv32a65x.pdf
 unpriv-html: setup
 	cd build/riscv-isa-manual/build; make unpriv-html
 	cp ./build/riscv-isa-manual/build/riscv-unprivileged.html unpriv-isa-cv32a65x.html
 clean:
 	rm -rf build
--- a/docs/riscv-isa/build.mk
+++ b/docs/riscv-isa/build.mk
@ -0,0 +1,41 @@
 #   Copyright 2024 Thales DIS France SAS
 #   Licensed under the Solderpad Hardware License, Version 2.1 (the "License");
 #   you may not use this file except in compliance with the License.
 #   SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
 #   You may obtain a copy of the License at https://solderpad.org/licenses/
 #
 #   Original Author: Jean-Roch COULON - Thales
 ifeq ($(CONFIG),)
 $(error CONFIG must be defined)
 endif
 # Path of current file, intended to be included by a configuration subfolder
 riscv-isa_dir := $(dir $(lastword $(MAKEFILE_LIST)))
 all: priv-pdf priv-html unpriv-pdf unpriv-html
 setup:
 	mkdir -p build/riscv-isa-manual
 	cp -r $(riscv-isa_dir)/riscv-isa-manual/* build/riscv-isa-manual
 	cp -r $(riscv-isa_dir)/src build/riscv-isa-manual
 	cp -r src build/riscv-isa-manual
 priv-pdf: setup
 	cd build/riscv-isa-manual/build; make priv-pdf
 	cp ./build/riscv-isa-manual/build/riscv-privileged.pdf priv-isa-$(CONFIG).pdf
 priv-html: setup
 	cd build/riscv-isa-manual/build; make priv-html
 	cp ./build/riscv-isa-manual/build/riscv-privileged.html priv-isa-$(CONFIG).html
 unpriv-pdf: setup
 	cd build/riscv-isa-manual/build; make unpriv-pdf
 	cp ./build/riscv-isa-manual/build/riscv-unprivileged.pdf unpriv-isa-$(CONFIG).pdf
 unpriv-html: setup
 	cd build/riscv-isa-manual/build; make unpriv-html
 	cp ./build/riscv-isa-manual/build/riscv-unprivileged.html unpriv-isa-$(CONFIG).html
 clean:
 	rm -rf build
--- a/docs/04_cv32a65x/riscv/riscv-isa-manual
+++ b/docs/04_cv32a65x/riscv/riscv-isa-manual
--- a/docs/04_cv32a65x/riscv/src/a-st-ext.adoc
+++ b/docs/04_cv32a65x/riscv/src/a-st-ext.adoc
--- a/docs/04_cv32a65x/riscv/src/bfloat16.adoc
+++ b/docs/04_cv32a65x/riscv/src/bfloat16.adoc
--- a/docs/04_cv32a65x/riscv/src/calling-convention.adoc
+++ b/docs/04_cv32a65x/riscv/src/calling-convention.adoc
--- a/docs/04_cv32a65x/riscv/src/cmo.adoc
+++ b/docs/04_cv32a65x/riscv/src/cmo.adoc
--- a/docs/04_cv32a65x/riscv/src/colophon.adoc
+++ b/docs/04_cv32a65x/riscv/src/colophon.adoc
--- a/docs/04_cv32a65x/riscv/src/counters.adoc
+++ b/docs/04_cv32a65x/riscv/src/counters.adoc
--- a/docs/04_cv32a65x/riscv/src/d-st-ext.adoc
+++ b/docs/04_cv32a65x/riscv/src/d-st-ext.adoc
--- a/docs/04_cv32a65x/riscv/src/f-st-ext.adoc
+++ b/docs/04_cv32a65x/riscv/src/f-st-ext.adoc
--- a/docs/04_cv32a65x/riscv/src/hypervisor.adoc
+++ b/docs/04_cv32a65x/riscv/src/hypervisor.adoc
--- a/docs/04_cv32a65x/riscv/src/images/bytefield/pmp-rv32.adoc
+++ b/docs/04_cv32a65x/riscv/src/images/bytefield/pmp-rv32.adoc
--- a/docs/04_cv32a65x/riscv/src/images/ohg_logo.png
+++ b/docs/04_cv32a65x/riscv/src/images/ohg_logo.png
--- a/docs/04_cv32a65x/riscv/src/indirect-csr.adoc
+++ b/docs/04_cv32a65x/riscv/src/indirect-csr.adoc
--- a/docs/04_cv32a65x/riscv/src/machine.adoc
+++ b/docs/04_cv32a65x/riscv/src/machine.adoc
--- a/docs/04_cv32a65x/riscv/src/priv-cfi.adoc
+++ b/docs/04_cv32a65x/riscv/src/priv-cfi.adoc
--- a/docs/04_cv32a65x/riscv/src/priv-preface.adoc
+++ b/docs/04_cv32a65x/riscv/src/priv-preface.adoc
--- a/docs/04_cv32a65x/riscv/src/q-st-ext.adoc
+++ b/docs/04_cv32a65x/riscv/src/q-st-ext.adoc
--- a/docs/04_cv32a65x/riscv/src/resources/themes/riscv-spec.yml
+++ b/docs/04_cv32a65x/riscv/src/resources/themes/riscv-spec.yml
--- a/docs/04_cv32a65x/riscv/src/riscv-privileged.adoc
+++ b/docs/04_cv32a65x/riscv/src/riscv-privileged.adoc
@ -1,5 +1,7 @@
 include::config.adoc[]
 [[risc-v-isa]]
-= The RISC-V Instruction Set Manual for CV32A65X: Volume II: Privileged Architecture
+= The RISC-V Instruction Set Manual for {ohg-config}: Volume II: Privileged Architecture
 :description: Volume II - Privileged Architecture
 :company: RISC-V.org
 :revnumber: 20240612
@ -60,8 +62,6 @@ endif::[]
 :approx: &#8776;
 :inf: &#8734;
 include::config.adoc[]
 This document describes the RISC-V privileged architecture tailored for
 OpenHW Group {ohg-config}.
 Not relevant parts (e.g. unsupported extensions) of the original
--- a/docs/04_cv32a65x/riscv/src/riscv-unprivileged.adoc
+++ b/docs/04_cv32a65x/riscv/src/riscv-unprivileged.adoc
@ -1,5 +1,7 @@
 include::config.adoc[]
 [[risc-v-isa]]
-= The RISC-V Instruction Set Manual for CV32A65X: Volume I - Unprivileged Architecture
+= The RISC-V Instruction Set Manual for {ohg-config}: Volume I - Unprivileged Architecture
 :description: Volume I - Unprivileged Architecture
 :company: RISC-V.org
 :revnumber: 20240612
@ -57,8 +59,6 @@ endif::[]
 :inf: &#8734;
 :csrname: envcfg
 include::config.adoc[]
 This document describes the RISC-V unprivileged architecture tailored for
 OpenHW Group {ohg-config}.
 Not relevant parts (e.g. unsupported extensions) of the original
--- a/docs/04_cv32a65x/riscv/src/rnmi.adoc
+++ b/docs/04_cv32a65x/riscv/src/rnmi.adoc
--- a/docs/04_cv32a65x/riscv/src/rv-32-64g.adoc
+++ b/docs/04_cv32a65x/riscv/src/rv-32-64g.adoc
--- a/docs/04_cv32a65x/riscv/src/rv128.adoc
+++ b/docs/04_cv32a65x/riscv/src/rv128.adoc
--- a/docs/04_cv32a65x/riscv/src/rv32e.adoc
+++ b/docs/04_cv32a65x/riscv/src/rv32e.adoc
--- a/docs/04_cv32a65x/riscv/src/rv64.adoc
+++ b/docs/04_cv32a65x/riscv/src/rv64.adoc
--- a/docs/04_cv32a65x/riscv/src/scalar-crypto.adoc
+++ b/docs/04_cv32a65x/riscv/src/scalar-crypto.adoc
--- a/docs/04_cv32a65x/riscv/src/smcdeleg.adoc
+++ b/docs/04_cv32a65x/riscv/src/smcdeleg.adoc
--- a/docs/04_cv32a65x/riscv/src/smcntrpmf.adoc
+++ b/docs/04_cv32a65x/riscv/src/smcntrpmf.adoc
--- a/docs/04_cv32a65x/riscv/src/smdbltrp.adoc
+++ b/docs/04_cv32a65x/riscv/src/smdbltrp.adoc
--- a/docs/04_cv32a65x/riscv/src/smepmp.adoc
+++ b/docs/04_cv32a65x/riscv/src/smepmp.adoc
--- a/docs/04_cv32a65x/riscv/src/smstateen.adoc
+++ b/docs/04_cv32a65x/riscv/src/smstateen.adoc
--- a/docs/04_cv32a65x/riscv/src/sscofpmf.adoc
+++ b/docs/04_cv32a65x/riscv/src/sscofpmf.adoc
--- a/docs/04_cv32a65x/riscv/src/ssdbltrp.adoc
+++ b/docs/04_cv32a65x/riscv/src/ssdbltrp.adoc
--- a/docs/04_cv32a65x/riscv/src/sstc.adoc
+++ b/docs/04_cv32a65x/riscv/src/sstc.adoc
--- a/docs/04_cv32a65x/riscv/src/supervisor.adoc
+++ b/docs/04_cv32a65x/riscv/src/supervisor.adoc
--- a/docs/04_cv32a65x/riscv/src/unpriv-cfi.adoc
+++ b/docs/04_cv32a65x/riscv/src/unpriv-cfi.adoc
--- a/docs/04_cv32a65x/riscv/src/v-st-ext.adoc
+++ b/docs/04_cv32a65x/riscv/src/v-st-ext.adoc
--- a/docs/04_cv32a65x/riscv/src/vector-crypto.adoc
+++ b/docs/04_cv32a65x/riscv/src/vector-crypto.adoc
--- a/docs/04_cv32a65x/riscv/src/vector-examples.adoc
+++ b/docs/04_cv32a65x/riscv/src/vector-examples.adoc
--- a/docs/04_cv32a65x/riscv/src/zabha.adoc
+++ b/docs/04_cv32a65x/riscv/src/zabha.adoc
--- a/docs/04_cv32a65x/riscv/src/zacas.adoc
+++ b/docs/04_cv32a65x/riscv/src/zacas.adoc
--- a/docs/04_cv32a65x/riscv/src/zawrs.adoc
+++ b/docs/04_cv32a65x/riscv/src/zawrs.adoc
--- a/docs/04_cv32a65x/riscv/src/zfa.adoc
+++ b/docs/04_cv32a65x/riscv/src/zfa.adoc
--- a/docs/04_cv32a65x/riscv/src/zfh.adoc
+++ b/docs/04_cv32a65x/riscv/src/zfh.adoc
--- a/docs/04_cv32a65x/riscv/src/zfinx.adoc
+++ b/docs/04_cv32a65x/riscv/src/zfinx.adoc
--- a/docs/04_cv32a65x/riscv/src/zicond.adoc
+++ b/docs/04_cv32a65x/riscv/src/zicond.adoc
--- a/docs/04_cv32a65x/riscv/src/zifencei.adoc
+++ b/docs/04_cv32a65x/riscv/src/zifencei.adoc
--- a/docs/04_cv32a65x/riscv/src/zihintntl.adoc
+++ b/docs/04_cv32a65x/riscv/src/zihintntl.adoc
--- a/docs/04_cv32a65x/riscv/src/zihintpause.adoc
+++ b/docs/04_cv32a65x/riscv/src/zihintpause.adoc
--- a/docs/04_cv32a65x/riscv/src/zimop.adoc
+++ b/docs/04_cv32a65x/riscv/src/zimop.adoc
--- a/docs/04_cv32a65x/riscv/src/ztso-st-ext.adoc
+++ b/docs/04_cv32a65x/riscv/src/ztso-st-ext.adoc