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transform rvfi types into macros (#1921)

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Côme 2024-03-12 17:34:27 +01:00 • committed by GitHub
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20 changed files with 299 additions and 244 deletions
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1
Flist.ariane
View file

@ -15,6 +15,7 @@
// Author: Michael Schaffner <schaffner@iis.ee.ethz.ch>, ETH Zurich
// Date: 15.08.2018
// Description: File list for OpenPiton flow
+incdir+core/include/
+incdir+vendor/pulp-platform/common_cells/include/
+incdir+common/local/util/
+incdir+corev_apu/register_interface/include/

3
Makefile
View file

@ -240,7 +240,8 @@ incdir := $(CVA6_REPO_DIR)/vendor/pulp-platform/common_cells/include/ $(CVA6_REP
$(CVA6_REPO_DIR)/vendor/pulp-platform/axi/include/ \
$(CVA6_REPO_DIR)/verif/core-v-verif/lib/uvm_agents/uvma_rvfi/ \
$(CVA6_REPO_DIR)/verif/core-v-verif/lib/uvm_agents/uvma_core_cntrl/ \
$(CVA6_REPO_DIR)/verif/tb/core/
$(CVA6_REPO_DIR)/verif/tb/core/ \
$(CVA6_REPO_DIR)/core/include/
# Compile and sim flags
compile_flag += +cover=bcfst+/dut -incr -64 -nologo -quiet -suppress 13262 -permissive -svinputport=compat +define+$(defines)

1
core/Flist.cva6
View file

@ -30,6 +30,7 @@ ${CVA6_REPO_DIR}/vendor/pulp-platform/fpga-support/rtl/SyncDpRam.sv
${CVA6_REPO_DIR}/vendor/pulp-platform/fpga-support/rtl/AsyncDpRam.sv
${CVA6_REPO_DIR}/vendor/pulp-platform/fpga-support/rtl/AsyncThreePortRam.sv
+incdir+${CVA6_REPO_DIR}/core/include/
+incdir+${CVA6_REPO_DIR}/vendor/pulp-platform/common_cells/include/
+incdir+${CVA6_REPO_DIR}/vendor/pulp-platform/common_cells/src/
+incdir+${CVA6_REPO_DIR}/vendor/pulp-platform/axi/include/

2
core/Flist.cva6_gate
View file

@ -8,6 +8,8 @@
# Original Author: Jean-Roch COULON - Thales
#
+incdir+${CVA6_REPO_DIR}/core/include/
${CVA6_REPO_DIR}/core/include/config_pkg.sv
${CVA6_REPO_DIR}/core/include/${TARGET_CFG}_config_pkg.sv
${CVA6_REPO_DIR}/core/include/riscv_pkg.sv

1
core/csr_regfile.sv
View file

@ -20,6 +20,7 @@ module csr_regfile
parameter type exception_t = logic,
parameter type irq_ctrl_t = logic,
parameter type scoreboard_entry_t = logic,
parameter type rvfi_probes_csr_t = logic,
parameter int AsidWidth = 1,
parameter int unsigned MHPMCounterNum = 6
) (

59
core/cva6.sv
View file

@ -12,6 +12,7 @@
// Date: 19.03.2017
// Description: CVA6 Top-level module
`include "rvfi_types.svh"
module cva6
import ariane_pkg::*;
@ -21,15 +22,23 @@ module cva6
cva6_config_pkg::cva6_cfg
),
// RVFI PROBES
parameter type rvfi_probes_instr_t = `RVFI_PROBES_INSTR_T(CVA6Cfg),
parameter type rvfi_probes_csr_t = `RVFI_PROBES_CSR_T(CVA6Cfg),
parameter type rvfi_probes_t = struct packed {
logic csr;
rvfi_probes_instr_t instr;
},
// branchpredict scoreboard entry
// this is the struct which we will inject into the pipeline to guide the various
// units towards the correct branch decision and resolve
parameter type branchpredict_sbe_t = struct packed {
localparam type branchpredict_sbe_t = struct packed {
cf_t cf; // type of control flow prediction
logic [riscv::VLEN-1:0] predict_address; // target address at which to jump, or not
},
parameter type exception_t = struct packed {
localparam type exception_t = struct packed {
logic [riscv::XLEN-1:0] cause; // cause of exception
logic [riscv::XLEN-1:0] tval; // additional information of causing exception (e.g.: instruction causing it),
// address of LD/ST fault
@ -38,25 +47,25 @@ module cva6
// cache request ports
// I$ address translation requests
parameter type icache_areq_t = struct packed {
localparam type icache_areq_t = struct packed {
logic fetch_valid; // address translation valid
logic [riscv::PLEN-1:0] fetch_paddr; // physical address in
exception_t fetch_exception; // exception occurred during fetch
},
parameter type icache_arsp_t = struct packed {
localparam type icache_arsp_t = struct packed {
logic fetch_req; // address translation request
logic [riscv::VLEN-1:0] fetch_vaddr; // virtual address out
},
// I$ data requests
parameter type icache_dreq_t = struct packed {
localparam type icache_dreq_t = struct packed {
logic req; // we request a new word
logic kill_s1; // kill the current request
logic kill_s2; // kill the last request
logic spec; // request is speculative
logic [riscv::VLEN-1:0] vaddr; // 1st cycle: 12 bit index is taken for lookup
},
parameter type icache_drsp_t = struct packed {
localparam type icache_drsp_t = struct packed {
logic ready; // icache is ready
logic valid; // signals a valid read
logic [ariane_pkg::FETCH_WIDTH-1:0] data; // 2+ cycle out: tag
@ -67,7 +76,7 @@ module cva6
// IF/ID Stage
// store the decompressed instruction
parameter type fetch_entry_t = struct packed {
localparam type fetch_entry_t = struct packed {
logic [riscv::VLEN-1:0] address; // the address of the instructions from below
logic [31:0] instruction; // instruction word
branchpredict_sbe_t branch_predict; // this field contains branch prediction information regarding the forward branch path
@ -75,7 +84,7 @@ module cva6
},
// ID/EX/WB Stage
parameter type scoreboard_entry_t = struct packed {
localparam type scoreboard_entry_t = struct packed {
logic [riscv::VLEN-1:0] pc; // PC of instruction
logic [TRANS_ID_BITS-1:0] trans_id; // this can potentially be simplified, we could index the scoreboard entry
// with the transaction id in any case make the width more generic
@ -103,7 +112,7 @@ module cva6
// this is the struct we get back from ex stage and we will use it to update
// all the necessary data structures
// bp_resolve_t
parameter type bp_resolve_t = struct packed {
localparam type bp_resolve_t = struct packed {
logic valid; // prediction with all its values is valid
logic [riscv::VLEN-1:0] pc; // PC of predict or mis-predict
logic [riscv::VLEN-1:0] target_address; // target address at which to jump, or not
@ -114,7 +123,7 @@ module cva6
// All information needed to determine whether we need to associate an interrupt
// with the corresponding instruction or not.
parameter type irq_ctrl_t = struct packed {
localparam type irq_ctrl_t = struct packed {
logic [riscv::XLEN-1:0] mie;
logic [riscv::XLEN-1:0] mip;
logic [riscv::XLEN-1:0] mideleg;
@ -122,7 +131,7 @@ module cva6
logic global_enable;
},
parameter type lsu_ctrl_t = struct packed {
localparam type lsu_ctrl_t = struct packed {
logic valid;
logic [riscv::VLEN-1:0] vaddr;
logic overflow;
@ -133,7 +142,7 @@ module cva6
logic [ariane_pkg::TRANS_ID_BITS-1:0] trans_id;
},
parameter type fu_data_t = struct packed {
localparam type fu_data_t = struct packed {
fu_t fu;
fu_op operation;
logic [riscv::XLEN-1:0] operand_a;
@ -142,13 +151,13 @@ module cva6
logic [ariane_pkg::TRANS_ID_BITS-1:0] trans_id;
},
parameter type icache_req_t = struct packed {
localparam type icache_req_t = struct packed {
logic [$clog2(ariane_pkg::ICACHE_SET_ASSOC)-1:0] way; // way to replace
logic [riscv::PLEN-1:0] paddr; // physical address
logic nc; // noncacheable
logic [wt_cache_pkg::CACHE_ID_WIDTH-1:0] tid; // threadi id (used as transaction id in Ariane)
},
parameter type icache_rtrn_t = struct packed {
localparam type icache_rtrn_t = struct packed {
wt_cache_pkg::icache_in_t rtype; // see definitions above
logic [ariane_pkg::ICACHE_LINE_WIDTH-1:0] data; // full cache line width
logic [ariane_pkg::ICACHE_USER_LINE_WIDTH-1:0] user; // user bits
@ -162,7 +171,7 @@ module cva6
},
// D$ data requests
parameter type dcache_req_i_t = struct packed {
localparam type dcache_req_i_t = struct packed {
logic [DCACHE_INDEX_WIDTH-1:0] address_index;
logic [DCACHE_TAG_WIDTH-1:0] address_tag;
logic [riscv::XLEN-1:0] data_wdata;
@ -176,7 +185,7 @@ module cva6
logic tag_valid;
},
parameter type dcache_req_o_t = struct packed {
localparam type dcache_req_o_t = struct packed {
logic data_gnt;
logic data_rvalid;
logic [DCACHE_TID_WIDTH-1:0] data_rid;
@ -184,11 +193,6 @@ module cva6
logic [DCACHE_USER_WIDTH-1:0] data_ruser;
},
parameter type rvfi_probes_t = struct packed {
logic csr; //disabled
rvfi_probes_instr_t instr;
},
// AXI types
parameter type axi_ar_chan_t = struct packed {
logic [CVA6Cfg.AxiIdWidth-1:0] id;
@ -911,6 +915,7 @@ module cva6
.exception_t (exception_t),
.irq_ctrl_t (irq_ctrl_t),
.scoreboard_entry_t(scoreboard_entry_t),
.rvfi_probes_csr_t (rvfi_probes_csr_t),
.AsidWidth (ASID_WIDTH),
.MHPMCounterNum (MHPMCounterNum)
) csr_regfile_i (
@ -1510,11 +1515,13 @@ module cva6
//RVFI INSTR
cva6_rvfi_probes #(
.CVA6Cfg (CVA6Cfg),
.exception_t (exception_t),
.scoreboard_entry_t(scoreboard_entry_t),
.lsu_ctrl_t (lsu_ctrl_t),
.rvfi_probes_t (rvfi_probes_t)
.CVA6Cfg (CVA6Cfg),
.exception_t (exception_t),
.scoreboard_entry_t (scoreboard_entry_t),
.lsu_ctrl_t (lsu_ctrl_t),
.rvfi_probes_instr_t(rvfi_probes_instr_t),
.rvfi_probes_csr_t (rvfi_probes_csr_t),
.rvfi_probes_t (rvfi_probes_t)
) i_cva6_rvfi_probes (
.flush_i (flush_ctrl_if),

2
core/cva6_rvfi.sv
View file

@ -15,6 +15,8 @@ module cva6_rvfi
parameter config_pkg::cva6_cfg_t CVA6Cfg = config_pkg::cva6_cfg_empty,
parameter type rvfi_instr_t = logic,
parameter type rvfi_csr_t = logic,
parameter type rvfi_probes_instr_t = logic,
parameter type rvfi_probes_csr_t = logic,
parameter type rvfi_probes_t = logic
) (

2
core/cva6_rvfi_probes.sv
View file

@ -16,6 +16,8 @@ module cva6_rvfi_probes
parameter type exception_t = logic,
parameter type scoreboard_entry_t = logic,
parameter type lsu_ctrl_t = logic,
parameter type rvfi_probes_instr_t = logic,
parameter type rvfi_probes_csr_t = logic,
parameter type rvfi_probes_t = logic
) (

136
core/include/ariane_pkg.sv
View file

@ -646,142 +646,6 @@ package ariane_pkg;
logic [63:0] result; // sign-extended, result
} amo_resp_t;
// RVFI instr
typedef struct packed {
logic [TRANS_ID_BITS-1:0] issue_pointer;
logic [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0][TRANS_ID_BITS-1:0] commit_pointer;
logic flush_unissued_instr;
logic decoded_instr_valid;
logic decoded_instr_ack;
logic flush;
logic issue_instr_ack;
logic fetch_entry_valid;
logic [31:0] instruction;
logic is_compressed;
riscv::xlen_t rs1_forwarding;
riscv::xlen_t rs2_forwarding;
logic [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0][riscv::VLEN-1:0] commit_instr_pc;
fu_op [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0][TRANS_ID_BITS-1:0] commit_instr_op;
logic [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0][REG_ADDR_SIZE-1:0] commit_instr_rs1;
logic [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0][REG_ADDR_SIZE-1:0] commit_instr_rs2;
logic [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0][REG_ADDR_SIZE-1:0] commit_instr_rd;
riscv::xlen_t [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0] commit_instr_result;
logic [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0][riscv::VLEN-1:0] commit_instr_valid;
riscv::xlen_t ex_commit_cause;
logic ex_commit_valid;
riscv::priv_lvl_t priv_lvl;
logic [riscv::VLEN-1:0] lsu_ctrl_vaddr;
fu_t lsu_ctrl_fu;
logic [(riscv::XLEN/8)-1:0] lsu_ctrl_be;
logic [TRANS_ID_BITS-1:0] lsu_ctrl_trans_id;
logic [((cva6_config_pkg::CVA6ConfigCvxifEn || cva6_config_pkg::CVA6ConfigVExtEn) ? 5 : 4)-1:0][riscv::XLEN-1:0] wbdata;
logic [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0] commit_ack;
logic [riscv::PLEN-1:0] mem_paddr;
logic debug_mode;
logic [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0][riscv::XLEN-1:0] wdata;
} rvfi_probes_instr_t;
// RVFI CSR element
typedef struct packed {
riscv::xlen_t rdata;
riscv::xlen_t rmask;
riscv::xlen_t wdata;
riscv::xlen_t wmask;
} rvfi_csr_elmt_t;
// RVFI CSR structure
typedef struct packed {
riscv::fcsr_t fcsr_q;
riscv::dcsr_t dcsr_q;
riscv::xlen_t dpc_q;
riscv::xlen_t dscratch0_q;
riscv::xlen_t dscratch1_q;
riscv::xlen_t mie_q;
riscv::xlen_t mip_q;
riscv::xlen_t stvec_q;
riscv::xlen_t scounteren_q;
riscv::xlen_t sscratch_q;
riscv::xlen_t sepc_q;
riscv::xlen_t scause_q;
riscv::xlen_t stval_q;
riscv::xlen_t satp_q;
riscv::xlen_t mstatus_extended;
riscv::xlen_t medeleg_q;
riscv::xlen_t mideleg_q;
riscv::xlen_t mtvec_q;
riscv::xlen_t mcounteren_q;
riscv::xlen_t mscratch_q;
riscv::xlen_t mepc_q;
riscv::xlen_t mcause_q;
riscv::xlen_t mtval_q;
logic fiom_q;
logic [MHPMCounterNum+3-1:0] mcountinhibit_q;
logic [63:0] cycle_q;
logic [63:0] instret_q;
riscv::xlen_t dcache_q;
riscv::xlen_t icache_q;
riscv::xlen_t acc_cons_q;
riscv::pmpcfg_t [15:0] pmpcfg_q;
logic [15:0][riscv::PLEN-3:0] pmpaddr_q;
} rvfi_probes_csr_t;
// RVFI CSR structure
typedef struct packed {
rvfi_csr_elmt_t fflags;
rvfi_csr_elmt_t frm;
rvfi_csr_elmt_t fcsr;
rvfi_csr_elmt_t ftran;
rvfi_csr_elmt_t dcsr;
rvfi_csr_elmt_t dpc;
rvfi_csr_elmt_t dscratch0;
rvfi_csr_elmt_t dscratch1;
rvfi_csr_elmt_t sstatus;
rvfi_csr_elmt_t sie;
rvfi_csr_elmt_t sip;
rvfi_csr_elmt_t stvec;
rvfi_csr_elmt_t scounteren;
rvfi_csr_elmt_t sscratch;
rvfi_csr_elmt_t sepc;
rvfi_csr_elmt_t scause;
rvfi_csr_elmt_t stval;
rvfi_csr_elmt_t satp;
rvfi_csr_elmt_t mstatus;
rvfi_csr_elmt_t mstatush;
rvfi_csr_elmt_t misa;
rvfi_csr_elmt_t medeleg;
rvfi_csr_elmt_t mideleg;
rvfi_csr_elmt_t mie;
rvfi_csr_elmt_t mtvec;
rvfi_csr_elmt_t mcounteren;
rvfi_csr_elmt_t mscratch;
rvfi_csr_elmt_t mepc;
rvfi_csr_elmt_t mcause;
rvfi_csr_elmt_t mtval;
rvfi_csr_elmt_t mip;
rvfi_csr_elmt_t menvcfg;
rvfi_csr_elmt_t menvcfgh;
rvfi_csr_elmt_t mvendorid;
rvfi_csr_elmt_t marchid;
rvfi_csr_elmt_t mhartid;
rvfi_csr_elmt_t mcountinhibit;
rvfi_csr_elmt_t mcycle;
rvfi_csr_elmt_t mcycleh;
rvfi_csr_elmt_t minstret;
rvfi_csr_elmt_t minstreth;
rvfi_csr_elmt_t cycle;
rvfi_csr_elmt_t cycleh;
rvfi_csr_elmt_t instret;
rvfi_csr_elmt_t instreth;
rvfi_csr_elmt_t dcache;
rvfi_csr_elmt_t icache;
rvfi_csr_elmt_t acc_cons;
rvfi_csr_elmt_t pmpcfg0;
rvfi_csr_elmt_t pmpcfg1;
rvfi_csr_elmt_t pmpcfg2;
rvfi_csr_elmt_t pmpcfg3;
rvfi_csr_elmt_t [15:0] pmpaddr;
} rvfi_csr_t;
localparam RVFI = cva6_config_pkg::CVA6ConfigRvfiTrace;
// ----------------------

164
core/include/rvfi_types.svh Normal file
View file

@ -0,0 +1,164 @@
`ifndef RVFI_TYPES_SVH
`define RVFI_TYPES_SVH
// RVFI
`define RVFI_INSTR_T(Cfg) struct packed { \
logic [config_pkg::NRET-1:0] valid; \
logic [config_pkg::NRET*64-1:0] order; \
logic [config_pkg::NRET*config_pkg::ILEN-1:0] insn; \
logic [config_pkg::NRET-1:0] trap; \
logic [config_pkg::NRET*riscv::XLEN-1:0] cause; \
logic [config_pkg::NRET-1:0] halt; \
logic [config_pkg::NRET-1:0] intr; \
logic [config_pkg::NRET*2-1:0] mode; \
logic [config_pkg::NRET*2-1:0] ixl; \
logic [config_pkg::NRET*5-1:0] rs1_addr; \
logic [config_pkg::NRET*5-1:0] rs2_addr; \
logic [config_pkg::NRET*riscv::XLEN-1:0] rs1_rdata; \
logic [config_pkg::NRET*riscv::XLEN-1:0] rs2_rdata; \
logic [config_pkg::NRET*5-1:0] rd_addr; \
logic [config_pkg::NRET*riscv::XLEN-1:0] rd_wdata; \
logic [config_pkg::NRET*riscv::XLEN-1:0] pc_rdata; \
logic [config_pkg::NRET*riscv::XLEN-1:0] pc_wdata; \
logic [config_pkg::NRET*riscv::VLEN-1:0] mem_addr; \
logic [config_pkg::NRET*riscv::PLEN-1:0] mem_paddr; \
logic [config_pkg::NRET*(riscv::XLEN/8)-1:0] mem_rmask; \
logic [config_pkg::NRET*(riscv::XLEN/8)-1:0] mem_wmask; \
logic [config_pkg::NRET*riscv::XLEN-1:0] mem_rdata; \
logic [config_pkg::NRET*riscv::XLEN-1:0] mem_wdata; \
}
`define RVFI_CSR_ELMT_T(Cfg) struct packed { \
riscv::xlen_t rdata; \
riscv::xlen_t rmask; \
riscv::xlen_t wdata; \
riscv::xlen_t wmask; \
}
`define RVFI_CSR_T(Cfg, rvfi_csr_elmt_t) struct packed { \
rvfi_csr_elmt_t fflags; \
rvfi_csr_elmt_t frm; \
rvfi_csr_elmt_t fcsr; \
rvfi_csr_elmt_t ftran; \
rvfi_csr_elmt_t dcsr; \
rvfi_csr_elmt_t dpc; \
rvfi_csr_elmt_t dscratch0; \
rvfi_csr_elmt_t dscratch1; \
rvfi_csr_elmt_t sstatus; \
rvfi_csr_elmt_t sie; \
rvfi_csr_elmt_t sip; \
rvfi_csr_elmt_t stvec; \
rvfi_csr_elmt_t scounteren; \
rvfi_csr_elmt_t sscratch; \
rvfi_csr_elmt_t sepc; \
rvfi_csr_elmt_t scause; \
rvfi_csr_elmt_t stval; \
rvfi_csr_elmt_t satp; \
rvfi_csr_elmt_t mstatus; \
rvfi_csr_elmt_t mstatush; \
rvfi_csr_elmt_t misa; \
rvfi_csr_elmt_t medeleg; \
rvfi_csr_elmt_t mideleg; \
rvfi_csr_elmt_t mie; \
rvfi_csr_elmt_t mtvec; \
rvfi_csr_elmt_t mcounteren; \
rvfi_csr_elmt_t mscratch; \
rvfi_csr_elmt_t mepc; \
rvfi_csr_elmt_t mcause; \
rvfi_csr_elmt_t mtval; \
rvfi_csr_elmt_t mip; \
rvfi_csr_elmt_t menvcfg; \
rvfi_csr_elmt_t menvcfgh; \
rvfi_csr_elmt_t mvendorid; \
rvfi_csr_elmt_t marchid; \
rvfi_csr_elmt_t mhartid; \
rvfi_csr_elmt_t mcountinhibit; \
rvfi_csr_elmt_t mcycle; \
rvfi_csr_elmt_t mcycleh; \
rvfi_csr_elmt_t minstret; \
rvfi_csr_elmt_t minstreth; \
rvfi_csr_elmt_t cycle; \
rvfi_csr_elmt_t cycleh; \
rvfi_csr_elmt_t instret; \
rvfi_csr_elmt_t instreth; \
rvfi_csr_elmt_t dcache; \
rvfi_csr_elmt_t icache; \
rvfi_csr_elmt_t acc_cons; \
rvfi_csr_elmt_t pmpcfg0; \
rvfi_csr_elmt_t pmpcfg1; \
rvfi_csr_elmt_t pmpcfg2; \
rvfi_csr_elmt_t pmpcfg3; \
rvfi_csr_elmt_t [15:0] pmpaddr; \
}
// RVFI PROBES
`define RVFI_PROBES_INSTR_T(Cfg) struct packed { \
logic [ariane_pkg::TRANS_ID_BITS-1:0] issue_pointer; \
logic [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0][ariane_pkg::TRANS_ID_BITS-1:0] commit_pointer; \
logic flush_unissued_instr; \
logic decoded_instr_valid; \
logic decoded_instr_ack; \
logic flush; \
logic issue_instr_ack; \
logic fetch_entry_valid; \
logic [31:0] instruction; \
logic is_compressed; \
riscv::xlen_t rs1_forwarding; \
riscv::xlen_t rs2_forwarding; \
logic [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0][riscv::VLEN-1:0] commit_instr_pc; \
ariane_pkg::fu_op [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0][ariane_pkg::TRANS_ID_BITS-1:0] commit_instr_op; \
logic [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0][ariane_pkg::REG_ADDR_SIZE-1:0] commit_instr_rs1; \
logic [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0][ariane_pkg::REG_ADDR_SIZE-1:0] commit_instr_rs2; \
logic [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0][ariane_pkg::REG_ADDR_SIZE-1:0] commit_instr_rd; \
riscv::xlen_t [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0] commit_instr_result; \
logic [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0][riscv::VLEN-1:0] commit_instr_valid; \
riscv::xlen_t ex_commit_cause; \
logic ex_commit_valid; \
riscv::priv_lvl_t priv_lvl; \
logic [riscv::VLEN-1:0] lsu_ctrl_vaddr; \
ariane_pkg::fu_t lsu_ctrl_fu; \
logic [(riscv::XLEN/8)-1:0] lsu_ctrl_be; \
logic [ariane_pkg::TRANS_ID_BITS-1:0] lsu_ctrl_trans_id; \
logic [((cva6_config_pkg::CVA6ConfigCvxifEn || cva6_config_pkg::CVA6ConfigVExtEn) ? 5 : 4)-1:0][riscv::XLEN-1:0] wbdata; \
logic [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0] commit_ack; \
logic [riscv::PLEN-1:0] mem_paddr; \
logic debug_mode; \
logic [cva6_config_pkg::CVA6ConfigNrCommitPorts-1:0][riscv::XLEN-1:0] wdata; \
}
`define RVFI_PROBES_CSR_T(Cfg) struct packed { \
riscv::fcsr_t fcsr_q; \
riscv::dcsr_t dcsr_q; \
riscv::xlen_t dpc_q; \
riscv::xlen_t dscratch0_q; \
riscv::xlen_t dscratch1_q; \
riscv::xlen_t mie_q; \
riscv::xlen_t mip_q; \
riscv::xlen_t stvec_q; \
riscv::xlen_t scounteren_q; \
riscv::xlen_t sscratch_q; \
riscv::xlen_t sepc_q; \
riscv::xlen_t scause_q; \
riscv::xlen_t stval_q; \
riscv::xlen_t satp_q; \
riscv::xlen_t mstatus_extended; \
riscv::xlen_t medeleg_q; \
riscv::xlen_t mideleg_q; \
riscv::xlen_t mtvec_q; \
riscv::xlen_t mcounteren_q; \
riscv::xlen_t mscratch_q; \
riscv::xlen_t mepc_q; \
riscv::xlen_t mcause_q; \
riscv::xlen_t mtval_q; \
logic fiom_q; \
logic [ariane_pkg::MHPMCounterNum+3-1:0] mcountinhibit_q; \
logic [63:0] cycle_q; \
logic [63:0] instret_q; \
riscv::xlen_t dcache_q; \
riscv::xlen_t icache_q; \
riscv::xlen_t acc_cons_q; \
riscv::pmpcfg_t [15:0] pmpcfg_q; \
logic [15:0][riscv::PLEN-3:0] pmpaddr_q; \
}
`endif // RVFI_TYPES_SVH

1
corev_apu/fpga/scripts/run.tcl
View file

@ -44,6 +44,7 @@ set_property include_dirs { \
"../../vendor/pulp-platform/axi/include" \
"../../core/cache_subsystem/hpdcache/rtl/include" \
"../register_interface/include" \
"../../core/include" \
} [current_fileset]
source scripts/add_sources.tcl

12
corev_apu/fpga/src/ariane_xilinx.sv
View file

@ -206,10 +206,12 @@ localparam config_pkg::cva6_user_cfg_t CVA6UserCfg = '{
};
localparam config_pkg::cva6_cfg_t CVA6Cfg = build_config_pkg::build_config(CVA6UserCfg);
localparam type rvfi_probes_t = struct packed {
logic csr;
logic instr;
};
localparam type rvfi_probes_instr_t = `RVFI_PROBES_INSTR_T(CVA6Cfg);
localparam type rvfi_probes_csr_t = `RVFI_PROBES_CSR_T(CVA6Cfg);
localparam type rvfi_probes_t = struct packed {
logic csr;
logic instr;
};
// 24 MByte in 8 byte words
localparam NumWords = (24 * 1024 * 1024) / 8;
@ -755,6 +757,8 @@ ariane_axi::resp_t axi_ariane_resp;
ariane #(
.CVA6Cfg ( CVA6Cfg ),
.rvfi_probes_instr_t ( rvfi_probes_instr_t ),
.rvfi_probes_csr_t ( rvfi_probes_csr_t ),
.rvfi_probes_t ( rvfi_probes_t )
) i_ariane (
.clk_i ( clk ),

12
corev_apu/src/ariane.sv
View file

@ -15,10 +15,12 @@
module ariane import ariane_pkg::*; #(
parameter config_pkg::cva6_cfg_t CVA6Cfg = config_pkg::cva6_cfg_empty,
parameter type rvfi_probes_t = struct packed {
logic csr;
logic instr;
},
parameter type rvfi_probes_instr_t = logic,
parameter type rvfi_probes_csr_t = logic,
parameter type rvfi_probes_t = struct packed {
logic csr;
logic instr;
},
parameter int unsigned AxiAddrWidth = ariane_axi::AddrWidth,
parameter int unsigned AxiDataWidth = ariane_axi::DataWidth,
parameter int unsigned AxiIdWidth = ariane_axi::IdWidth,
@ -53,6 +55,8 @@ module ariane import ariane_pkg::*; #(
cva6 #(
.CVA6Cfg ( CVA6Cfg ),
.rvfi_probes_instr_t ( rvfi_probes_instr_t ),
.rvfi_probes_csr_t ( rvfi_probes_csr_t ),
.rvfi_probes_t ( rvfi_probes_t ),
.axi_ar_chan_t (axi_ar_chan_t),
.axi_aw_chan_t (axi_aw_chan_t),

14
corev_apu/tb/ariane_tb.sv
View file

@ -18,6 +18,7 @@ import ariane_pkg::*;
import uvm_pkg::*;
`include "uvm_macros.svh"
`include "rvfi_types.svh"
`define MAIN_MEM(P) dut.i_sram.gen_cut[0].i_tc_sram_wrapper.i_tc_sram.init_val[(``P``)]
// `define USER_MEM(P) dut.i_sram.gen_cut[0].gen_mem.gen_mem_user.i_tc_sram_wrapper_user.i_tc_sram.init_val[(``P``)]
@ -31,6 +32,19 @@ module ariane_tb;
// cva6 configuration
localparam config_pkg::cva6_cfg_t CVA6Cfg = build_config_pkg::build_config(cva6_config_pkg::cva6_cfg);
// RVFI
localparam type rvfi_instr_t = `RVFI_INSTR_T(CVA6Cfg);
localparam type rvfi_csr_elmt_t = `RVFI_CSR_ELMT_T(CVA6Cfg);
localparam type rvfi_csr_t = `RVFI_CSR_T(CVA6Cfg, rvfi_csr_elmt_t);
// RVFI PROBES
localparam type rvfi_probes_instr_t = `RVFI_PROBES_INSTR_T(CVA6Cfg);
localparam type rvfi_probes_csr_t = `RVFI_PROBES_CSR_T(CVA6Cfg);
localparam type rvfi_probes_t = struct packed {
rvfi_probes_csr_t csr;
rvfi_probes_instr_t instr;
};
static uvm_cmdline_processor uvcl = uvm_cmdline_processor::get_inst();
localparam int unsigned CLOCK_PERIOD = 20ns;

56
corev_apu/tb/ariane_testharness.sv
View file

@ -14,6 +14,7 @@
// Instantiates an AXI-Bus and memories
`include "axi/assign.svh"
`include "rvfi_types.svh"
module ariane_testharness #(
parameter config_pkg::cva6_cfg_t CVA6Cfg = build_config_pkg::build_config(cva6_config_pkg::cva6_cfg),
@ -34,39 +35,18 @@ module ariane_testharness #(
);
localparam [7:0] hart_id = '0;
// RVFI
localparam type rvfi_instr_t = struct packed {
logic [config_pkg::NRET-1:0] valid;
logic [config_pkg::NRET*64-1:0] order;
logic [config_pkg::NRET*config_pkg::ILEN-1:0] insn;
logic [config_pkg::NRET-1:0] trap;
logic [config_pkg::NRET*riscv::XLEN-1:0] cause;
logic [config_pkg::NRET-1:0] halt;
logic [config_pkg::NRET-1:0] intr;
logic [config_pkg::NRET*2-1:0] mode;
logic [config_pkg::NRET*2-1:0] ixl;
logic [config_pkg::NRET*5-1:0] rs1_addr;
logic [config_pkg::NRET*5-1:0] rs2_addr;
logic [config_pkg::NRET*riscv::XLEN-1:0] rs1_rdata;
logic [config_pkg::NRET*riscv::XLEN-1:0] rs2_rdata;
logic [config_pkg::NRET*5-1:0] rd_addr;
logic [config_pkg::NRET*riscv::XLEN-1:0] rd_wdata;
logic [config_pkg::NRET*riscv::XLEN-1:0] pc_rdata;
logic [config_pkg::NRET*riscv::XLEN-1:0] pc_wdata;
logic [config_pkg::NRET*riscv::VLEN-1:0] mem_addr;
logic [config_pkg::NRET*riscv::PLEN-1:0] mem_paddr;
logic [config_pkg::NRET*(riscv::XLEN/8)-1:0] mem_rmask;
logic [config_pkg::NRET*(riscv::XLEN/8)-1:0] mem_wmask;
logic [config_pkg::NRET*riscv::XLEN-1:0] mem_rdata;
logic [config_pkg::NRET*riscv::XLEN-1:0] mem_wdata;
};
localparam type rvfi_probes_t = struct packed {
ariane_pkg::rvfi_probes_csr_t csr;
ariane_pkg::rvfi_probes_instr_t instr;
// RVFI
localparam type rvfi_instr_t = `RVFI_INSTR_T(CVA6Cfg);
localparam type rvfi_csr_elmt_t = `RVFI_CSR_ELMT_T(CVA6Cfg);
localparam type rvfi_csr_t = `RVFI_CSR_T(CVA6Cfg, rvfi_csr_elmt_t);
// RVFI PROBES
localparam type rvfi_probes_instr_t = `RVFI_PROBES_INSTR_T(CVA6Cfg);
localparam type rvfi_probes_csr_t = `RVFI_PROBES_CSR_T(CVA6Cfg);
localparam type rvfi_probes_t = struct packed {
rvfi_probes_csr_t csr;
rvfi_probes_instr_t instr;
};
// disable test-enable
@ -634,11 +614,13 @@ module ariane_testharness #(
ariane_axi::req_t axi_ariane_req;
ariane_axi::resp_t axi_ariane_resp;
rvfi_probes_t rvfi_probes;
ariane_pkg::rvfi_csr_t rvfi_csr;
rvfi_csr_t rvfi_csr;
rvfi_instr_t [CVA6Cfg.NrCommitPorts-1:0] rvfi_instr;
ariane #(
.CVA6Cfg ( CVA6Cfg ),
.rvfi_probes_instr_t ( rvfi_probes_instr_t ),
.rvfi_probes_csr_t ( rvfi_probes_csr_t ),
.rvfi_probes_t ( rvfi_probes_t ),
.noc_req_t ( ariane_axi::req_t ),
.noc_resp_t ( ariane_axi::resp_t )
@ -686,7 +668,9 @@ module ariane_testharness #(
cva6_rvfi #(
.CVA6Cfg (CVA6Cfg),
.rvfi_instr_t(rvfi_instr_t),
.rvfi_csr_t(ariane_pkg::rvfi_csr_t),
.rvfi_csr_t(rvfi_csr_t),
.rvfi_probes_instr_t(rvfi_probes_instr_t),
.rvfi_probes_csr_t(rvfi_probes_csr_t),
.rvfi_probes_t(rvfi_probes_t)
) i_cva6_rvfi (
.clk_i (clk_i),
@ -699,7 +683,7 @@ module ariane_testharness #(
rvfi_tracer #(
.CVA6Cfg(CVA6Cfg),
.rvfi_instr_t(rvfi_instr_t),
.rvfi_csr_t(ariane_pkg::rvfi_csr_t),
.rvfi_csr_t(rvfi_csr_t),
//
.HART_ID(hart_id),
.DEBUG_START(0),

2
pd/synth/cva6_synth.tcl
View file

@ -17,7 +17,7 @@ set clk_period $PERIOD
set input_delay $INPUT_DELAY
set output_delay $OUTPUT_DELAY
set_app_var search_path "../../vendor/pulp-platform/common_cells/include/ $search_path"
set_app_var search_path "../../core/include/ ../../vendor/pulp-platform/common_cells/include/ $search_path"
sh rm -rf work
sh mkdir work

13
verif/tb/uvmt/cva6_tb_wrapper.sv
View file

@ -37,7 +37,11 @@ import "DPI-C" context function void read_section_sv(input longint address, inou
module cva6_tb_wrapper import uvmt_cva6_pkg::*; #(
parameter config_pkg::cva6_cfg_t CVA6Cfg = config_pkg::cva6_cfg_empty,
parameter type rvfi_instr_t = logic,
parameter type rvfi_csr_elmt_t = logic,
parameter type rvfi_csr_t = logic,
parameter type rvfi_probes_instr_t = logic,
parameter type rvfi_probes_csr_t = logic,
parameter type rvfi_probes_t = logic,
//
parameter int unsigned AXI_USER_EN = 0,
parameter int unsigned NUM_WORDS = 2**25
@ -55,11 +59,6 @@ module cva6_tb_wrapper import uvmt_cva6_pkg::*; #(
uvmt_default_inputs_intf default_inputs_vif
);
localparam type rvfi_probes_t = struct packed {
ariane_pkg::rvfi_probes_csr_t csr;
ariane_pkg::rvfi_probes_instr_t instr;
};
ariane_axi::req_t axi_ariane_req;
ariane_axi::resp_t axi_ariane_resp;
@ -74,6 +73,8 @@ module cva6_tb_wrapper import uvmt_cva6_pkg::*; #(
cva6 #(
.CVA6Cfg ( CVA6Cfg ),
.rvfi_probes_instr_t ( rvfi_probes_instr_t ),
.rvfi_probes_csr_t ( rvfi_probes_csr_t ),
.rvfi_probes_t ( rvfi_probes_t )
) i_cva6 (
.clk_i ( clk_i ),
@ -99,6 +100,8 @@ module cva6_tb_wrapper import uvmt_cva6_pkg::*; #(
.CVA6Cfg (CVA6Cfg),
.rvfi_instr_t(rvfi_instr_t),
.rvfi_csr_t(rvfi_csr_t),
.rvfi_probes_instr_t(rvfi_probes_instr_t),
.rvfi_probes_csr_t(rvfi_probes_csr_t),
.rvfi_probes_t(rvfi_probes_t)
) i_cva6_rvfi (
.clk_i (clk_i),

8
verif/tb/uvmt/uvmt_cva6_dut_wrap.sv
View file

@ -17,7 +17,11 @@
module uvmt_cva6_dut_wrap # (
parameter config_pkg::cva6_cfg_t CVA6Cfg = config_pkg::cva6_cfg_empty,
parameter type rvfi_instr_t = logic,
parameter type rvfi_csr_elmt_t = logic,
parameter type rvfi_csr_t = logic,
parameter type rvfi_probes_instr_t = logic,
parameter type rvfi_probes_csr_t = logic,
parameter type rvfi_probes_t = logic,
//
parameter int unsigned AXI_USER_EN = 0,
parameter int unsigned NUM_WORDS = 2**25
@ -40,7 +44,11 @@ module uvmt_cva6_dut_wrap # (
cva6_tb_wrapper #(
.CVA6Cfg ( CVA6Cfg ),
.rvfi_instr_t ( rvfi_instr_t ),
.rvfi_csr_elmt_t ( rvfi_csr_elmt_t ),
.rvfi_csr_t ( rvfi_csr_t ),
.rvfi_probes_instr_t(rvfi_probes_instr_t),
.rvfi_probes_csr_t ( rvfi_probes_csr_t ),
.rvfi_probes_t ( rvfi_probes_t ),
//
.AXI_USER_EN (AXI_USER_EN),
.NUM_WORDS (NUM_WORDS)

49
verif/tb/uvmt/uvmt_cva6_tb.sv
View file

@ -18,6 +18,7 @@
`ifndef __UVMT_CVA6_TB_SV__
`define __UVMT_CVA6_TB_SV__
`include "rvfi_types.svh"
/**
* Module encapsulating the CVA6 DUT wrapper, and associated SV interfaces.
@ -35,34 +36,19 @@ module uvmt_cva6_tb;
// CVA6 config
localparam config_pkg::cva6_cfg_t CVA6Cfg = build_config_pkg::build_config(cva6_config_pkg::cva6_cfg);
// RVFI
localparam type rvfi_instr_t = struct packed {
logic [config_pkg::NRET-1:0] valid;
logic [config_pkg::NRET*64-1:0] order;
logic [config_pkg::NRET*config_pkg::ILEN-1:0] insn;
logic [config_pkg::NRET-1:0] trap;
logic [config_pkg::NRET*riscv::XLEN-1:0] cause;
logic [config_pkg::NRET-1:0] halt;
logic [config_pkg::NRET-1:0] intr;
logic [config_pkg::NRET*2-1:0] mode;
logic [config_pkg::NRET*2-1:0] ixl;
logic [config_pkg::NRET*5-1:0] rs1_addr;
logic [config_pkg::NRET*5-1:0] rs2_addr;
logic [config_pkg::NRET*riscv::XLEN-1:0] rs1_rdata;
logic [config_pkg::NRET*riscv::XLEN-1:0] rs2_rdata;
logic [config_pkg::NRET*5-1:0] rd_addr;
logic [config_pkg::NRET*riscv::XLEN-1:0] rd_wdata;
logic [config_pkg::NRET*riscv::XLEN-1:0] pc_rdata;
logic [config_pkg::NRET*riscv::XLEN-1:0] pc_wdata;
logic [config_pkg::NRET*riscv::VLEN-1:0] mem_addr;
logic [config_pkg::NRET*riscv::PLEN-1:0] mem_paddr;
logic [config_pkg::NRET*(riscv::XLEN/8)-1:0] mem_rmask;
logic [config_pkg::NRET*(riscv::XLEN/8)-1:0] mem_wmask;
logic [config_pkg::NRET*riscv::XLEN-1:0] mem_rdata;
logic [config_pkg::NRET*riscv::XLEN-1:0] mem_wdata;
// RVFI
localparam type rvfi_instr_t = `RVFI_INSTR_T(CVA6Cfg);
localparam type rvfi_csr_elmt_t = `RVFI_CSR_ELMT_T(CVA6Cfg);
localparam type rvfi_csr_t = `RVFI_CSR_T(CVA6Cfg, rvfi_csr_elmt_t);
// RVFI PROBES
localparam type rvfi_probes_instr_t = `RVFI_PROBES_INSTR_T(CVA6Cfg);
localparam type rvfi_probes_csr_t = `RVFI_PROBES_CSR_T(CVA6Cfg);
localparam type rvfi_probes_t = struct packed {
rvfi_probes_csr_t csr;
rvfi_probes_instr_t instr;
};
localparam AXI_USER_EN = ariane_pkg::AXI_USER_EN;
localparam NUM_WORDS = 2**24;
@ -105,8 +91,9 @@ module uvmt_cva6_tb;
// DUT Wrapper Interfaces
uvmt_rvfi_if #(
// RVFI
.CVA6Cfg ( CVA6Cfg ),
.rvfi_instr_t ( rvfi_instr_t ),
.CVA6Cfg ( CVA6Cfg )
.rvfi_csr_t ( rvfi_csr_t )
) rvfi_if(
.rvfi_o(),
.rvfi_csr_o(),
@ -120,7 +107,11 @@ module uvmt_cva6_tb;
uvmt_cva6_dut_wrap #(
.CVA6Cfg ( CVA6Cfg ),
.rvfi_instr_t ( rvfi_instr_t ),
.rvfi_csr_t ( ariane_pkg::rvfi_csr_t ),
.rvfi_csr_elmt_t ( rvfi_csr_elmt_t ),
.rvfi_csr_t ( rvfi_csr_t ),
.rvfi_probes_instr_t(rvfi_probes_instr_t ),
.rvfi_probes_csr_t ( rvfi_probes_csr_t ),
.rvfi_probes_t ( rvfi_probes_t ),
//
.AXI_USER_EN (AXI_USER_EN),
.NUM_WORDS (NUM_WORDS)

5
verif/tb/uvmt/uvmt_cva6_tb_ifs.sv
View file

@ -23,10 +23,11 @@
interface uvmt_rvfi_if #(
parameter config_pkg::cva6_cfg_t CVA6Cfg = config_pkg::cva6_cfg_empty,
parameter type rvfi_instr_t = logic
parameter type rvfi_instr_t = logic,
parameter type rvfi_csr_t = logic
) (
output rvfi_instr_t [CVA6Cfg.NrCommitPorts-1:0] rvfi_o,
output ariane_pkg::rvfi_csr_t rvfi_csr_o,
output rvfi_csr_t rvfi_csr_o,
output logic[31:0] tb_exit_o
);