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🐛 Fix default assignment of instret and cycle

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This commit is contained in:
Florian Zaruba 2018-10-31 00:10:26 +01:00
parent c9366c4478
commit 8401bb9970
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1 changed files with 3 additions and 8 deletions
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11
src/csr_regfile.sv
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@ -267,15 +267,13 @@ module csr_regfile #(
// --------------------
// Counters
// --------------------
cycle_d = cycle_q;
instret_d = instret_q;
if (!debug_mode_q) begin
// just increment the cycle count
cycle_d = cycle_q + 1'b1;
// increase instruction retired counter
for (int i = 0; i < NR_COMMIT_PORTS; i++) begin
if (commit_ack_i[i]) begin
instret++;
end
end
for (int i = 0; i < NR_COMMIT_PORTS; i++) if (commit_ack_i[i]) instret++;
instret_d = instret;
end
@ -327,9 +325,6 @@ module csr_regfile #(
stval_d = stval_q;
satp_d = satp_q;
cycle_d = cycle_q;
instret_d = instret_q;
en_ld_st_translation_d = en_ld_st_translation_q;
dirty_fp_state_csr = 1'b0;
pmpcfg0_d = pmpcfg0_q;