Clean-up add github remotes to submodules

.gitmodules

@@ -1,12 +1,6 @@
-[submodule "uvm-scaffold"]
-	path = uvm-scaffold
-	url = ../uvm-scaffold.git
-[submodule "riscv-tests"]
-	path = riscv-tests
-	url = ../riscv-tests.git
 [submodule "riscv-torture"]
 	path = riscv-torture
-	url = ../riscv-torture.git
+	url = https://github.com/pulp-platform/riscv-torture.git
 [submodule "tb"]
 	path = tb
 	url = ../uvm-components.git

CHANGELOG.md

@@ -6,7 +6,19 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.
 
 ## [Unreleased]
 
-### 1.0.0
+### 2.0.0 - 2018-01-26
+
+### Added
+
+- Instruction cache added
+- Support for Verilator
+
+### Changed
+
+- CI support for verilator
+- Update documentation
+
+### 1.0.0 - 2018-01-17
 
 ### Added
 
@@ -21,6 +33,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.
 - Testbench: EOC component now listening on store interface only
 - Store interfaces has been simplified by removing the `valid` signal, a transaction is now considered finished as soon as the dcache gives the grant signal.
 - EOC and dcache checker has been reworked to get rid of absolute path in UVM testbench
+- Fix problem when bypassing the data cache
 
 ### 0.4.0 - 2017-10-13
 
@@ -36,6 +49,7 @@ Linux booting on FPGA.
 - Fixed synthesis issues
 
 ## [0.3.0] - 2017-07-15
+
 ### Added
 - Added support for device tree in Ariane's testbench
 
@@ -47,6 +61,7 @@ Linux booting on FPGA.
 - Changelog design, adhering to a common [standard](http://keepachangelog.com/en/1.0.0/)
 
 ## [0.2.0] - 2017-06-28
+
 ### Added
 - Virtual memory support according to RISC-V privilege specification 1.11 (WIP)
 - Add support for Torture test framework
@@ -57,6 +72,7 @@ Linux booting on FPGA.
 - New fetch interface, smaller and ready for macro-op fusion and dual-issue
 
 ## [0.1.0] - 2017-06-21
+
 ### Added
 - Initial development, getting to a stable point
 

riscv-torture

@@ -1 +1 @@
-Subproject commit 525d333fdaea6a5be4bbe56c9ec3fd2dd0bf7a45
+Subproject commit 4e1c13adc5c1bb1128c5c57349e7e2d78fafc139

src/axi_slice

@@ -1 +1 @@
-Subproject commit 940ab2b25c0d189a333343641b2e6e82ef227974
+Subproject commit f8886bd3f2d4967aaccff15b67bf1f9e1a0e3453

uvm-scaffold

@@ -1 +0,0 @@
-Subproject commit b538de04e8b9a8c67e49ad9aa057bbd1d9a6d717