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https://github.com/openhwgroup/cva6.git
synced 2025-04-22 21:27:10 -04:00
Add priv level to cva6.py and fix smoke-tests (#1768)
This commit is contained in:
MarioOpenHWGroup
GitHub
parent
78111aa5eb
commit
8b6e8295f8
4 changed files with 28 additions and 24 deletions
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@ -13,6 +13,8 @@ if ! [ -n "$RISCV" ]; then
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return
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fi
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source ./verif/sim/setup-env.sh
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# install the required tools
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source ./verif/regress/install-verilator.sh
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source ./verif/regress/install-spike.sh
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@ -20,9 +22,6 @@ source ./verif/regress/install-riscv-compliance.sh
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source ./verif/regress/install-riscv-tests.sh
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source ./verif/regress/install-riscv-arch-test.sh
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source ./verif/sim/setup-env.sh
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if ! [ -n "$DV_SIMULATORS" ]; then
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DV_SIMULATORS=vcs-testharness,spike
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fi
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@ -44,6 +44,7 @@ issrun_opts ?=
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isspostrun_opts ?=
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log ?=
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variant ?=
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priv ?=
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# Spike tandem mode: default to environment setting (DISABLED if envariable SPIKE_TANDEM is not set).
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export spike-tandem ?= $(SPIKE_TANDEM)
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@ -120,7 +121,7 @@ endif
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###############################################################################
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spike:
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LD_LIBRARY_PATH="$$(realpath ../../tools/spike/lib):$$LD_LIBRARY_PATH" \
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$(tool_path)/spike $(spike_stepout) $(spike_extension) --log-commits --isa=$(variant) -l $(elf)
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$(tool_path)/spike $(spike_stepout) $(spike_extension) --log-commits --isa=$(variant) --priv=$(priv) -l $(elf)
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cp $(log).iss $(log)
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###############################################################################
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@ -114,7 +114,7 @@ def get_generator_cmd(simulator, simulator_yaml, cov, exp, debug_cmd):
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sys.exit(RET_FAIL)
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def parse_iss_yaml(iss, iss_yaml, isa, target, setting_dir, debug_cmd):
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def parse_iss_yaml(iss, iss_yaml, isa, target, setting_dir, debug_cmd, priv):
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"""Parse ISS YAML to get the simulation command
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Args:
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@ -154,6 +154,7 @@ def parse_iss_yaml(iss, iss_yaml, isa, target, setting_dir, debug_cmd):
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cmd = re.sub("\<variant\>", variant, cmd)
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else:
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cmd = re.sub("\<variant\>", isa, cmd)
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cmd = re.sub("\<priv\>", priv, cmd)
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return cmd
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logging.error("Cannot find ISS %0s" % iss)
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@ -409,7 +410,7 @@ def gcc_compile(test_list, output_dir, isa, mabi, opts, debug_cmd, linker):
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def run_assembly(asm_test, iss_yaml, isa, target, mabi, gcc_opts, iss_opts, output_dir,
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setting_dir, debug_cmd, linker):
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setting_dir, debug_cmd, linker, priv):
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"""Run a directed assembly test with ISS
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Args:
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@ -460,7 +461,7 @@ def run_assembly(asm_test, iss_yaml, isa, target, mabi, gcc_opts, iss_opts, outp
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else:
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log = ("%s/%s_sim/%s.log" % (output_dir, iss, asm))
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log_list.append(log)
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base_cmd = parse_iss_yaml(iss, iss_yaml, isa, target, setting_dir, debug_cmd)
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base_cmd = parse_iss_yaml(iss, iss_yaml, isa, target, setting_dir, debug_cmd, priv)
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cmd = get_iss_cmd(base_cmd, elf, target, log)
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logging.info("[%0s] Running ISS simulation: %s" % (iss, cmd))
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run_cmd(cmd, 300, debug_cmd = debug_cmd)
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@ -536,7 +537,7 @@ def run_elf(c_test, iss_yaml, isa, target, mabi, gcc_opts, iss_opts, output_dir,
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run_cmd("mkdir -p %s/%s_sim" % (output_dir, iss))
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log = ("%s/%s_sim/%s.log" % (output_dir, iss, c))
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log_list.append(log)
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base_cmd = parse_iss_yaml(iss, iss_yaml, isa, target, setting_dir, debug_cmd)
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base_cmd = parse_iss_yaml(iss, iss_yaml, isa, target, setting_dir, debug_cmd, priv)
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cmd = get_iss_cmd(base_cmd, elf, target, log)
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logging.info("[%0s] Running ISS simulation: %s" % (iss, cmd))
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if "veri" in iss: ratio = 35
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@ -548,7 +549,7 @@ def run_elf(c_test, iss_yaml, isa, target, mabi, gcc_opts, iss_opts, output_dir,
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def run_c(c_test, iss_yaml, isa, target, mabi, gcc_opts, iss_opts, output_dir,
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setting_dir, debug_cmd, linker):
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setting_dir, debug_cmd, linker, priv):
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"""Run a directed c test with ISS
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Args:
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@ -597,7 +598,7 @@ def run_c(c_test, iss_yaml, isa, target, mabi, gcc_opts, iss_opts, output_dir,
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else:
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log = ("%s/%s_sim/%s.log" % (output_dir, iss, c))
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log_list.append(log)
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base_cmd = parse_iss_yaml(iss, iss_yaml, isa, target, setting_dir, debug_cmd)
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base_cmd = parse_iss_yaml(iss, iss_yaml, isa, target, setting_dir, debug_cmd, priv)
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cmd = get_iss_cmd(base_cmd, elf, target, log)
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logging.info("[%0s] Running ISS simulation: %s" % (iss, cmd))
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run_cmd(cmd, 300, debug_cmd = debug_cmd)
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@ -607,7 +608,7 @@ def run_c(c_test, iss_yaml, isa, target, mabi, gcc_opts, iss_opts, output_dir,
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def run_c_from_dir(c_test_dir, iss_yaml, isa, mabi, gcc_opts, iss,
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output_dir, setting_dir, debug_cmd):
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output_dir, setting_dir, debug_cmd, priv):
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"""Run a directed c test from a directory with spike
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Args:
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@ -628,7 +629,7 @@ def run_c_from_dir(c_test_dir, iss_yaml, isa, mabi, gcc_opts, iss,
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(len(c_list), c_test_dir))
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for c_file in c_list:
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run_c(c_file, iss_yaml, isa, target, mabi, gcc_opts, iss, output_dir,
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setting_dir, debug_cmd, linker)
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setting_dir, debug_cmd, linker, priv)
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if "," in iss:
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report = ("%s/iss_regr.log" % output_dir).rstrip()
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save_regr_report(report)
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@ -637,7 +638,7 @@ def run_c_from_dir(c_test_dir, iss_yaml, isa, mabi, gcc_opts, iss,
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def iss_sim(test_list, output_dir, iss_list, iss_yaml, iss_opts,
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isa, target, setting_dir, timeout_s, debug_cmd):
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isa, target, setting_dir, timeout_s, debug_cmd, priv):
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"""Run ISS simulation with the generated test program
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Args:
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@ -653,7 +654,7 @@ def iss_sim(test_list, output_dir, iss_list, iss_yaml, iss_opts,
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"""
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for iss in iss_list.split(","):
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log_dir = ("%s/%s_sim" % (output_dir, iss))
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base_cmd = parse_iss_yaml(iss, iss_yaml, isa, target, setting_dir, debug_cmd)
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base_cmd = parse_iss_yaml(iss, iss_yaml, isa, target, setting_dir, debug_cmd, priv)
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logging.info("%s sim log dir: %s" % (iss, log_dir))
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run_cmd_output(["mkdir", "-p", log_dir])
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for test in test_list:
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@ -811,6 +812,8 @@ def parse_args(cwd):
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command is not specified")
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parser.add_argument("--isa", type=str, default="",
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help="RISC-V ISA subset")
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parser.add_argument("--priv", type=str, default="msu",
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help="RISC-V ISA privilege models")
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parser.add_argument("-m", "--mabi", type=str, default="",
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help="mabi used for compilation", dest="mabi")
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parser.add_argument("--gen_timeout", type=int, default=360,
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@ -957,6 +960,7 @@ def load_config(args, cwd):
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elif args.target == "cv32a6_embedded":
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args.mabi = "ilp32"
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args.isa = "rv32imc_zba_zbb_zbs_zbc"
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args.priv = "m"
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elif args.target == "cv32a6_imac_sv0":
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args.mabi = "ilp32"
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args.isa = "rv32imac"
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@ -1106,11 +1110,11 @@ def main():
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if os.path.isdir(full_path):
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run_assembly_from_dir(full_path, args.iss_yaml, args.isa, args.mabi,
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args.gcc_opts, args.iss, output_dir,
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args.core_setting_dir, args.debug)
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args.core_setting_dir, args.debug, args.priv)
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# path_asm_test is an assembly file
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elif os.path.isfile(full_path) or args.debug:
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run_assembly(full_path, args.iss_yaml, args.isa, args.target, args.mabi, args.gcc_opts,
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args.iss, output_dir, args.core_setting_dir, args.debug, args.linker)
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args.iss, output_dir, args.core_setting_dir, args.debug, args.linker, args.priv)
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else:
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logging.error('%s does not exist' % full_path)
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sys.exit(RET_FAIL)
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@ -1125,11 +1129,11 @@ def main():
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if os.path.isdir(full_path):
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run_c_from_dir(full_path, args.iss_yaml, args.isa, args.mabi,
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args.gcc_opts, args.iss, output_dir,
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args.core_setting_dir, args.debug)
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args.core_setting_dir, args.debug, args.priv)
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# path_c_test is a c file
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elif os.path.isfile(full_path) or args.debug:
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run_c(full_path, args.iss_yaml, args.isa, args.target, args.mabi, args.gcc_opts,
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args.iss, output_dir, args.core_setting_dir, args.debug, args.linker)
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args.iss, output_dir, args.core_setting_dir, args.debug, args.linker, args.priv)
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else:
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logging.error('%s does not exist' % full_path)
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sys.exit(RET_FAIL)
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@ -1218,11 +1222,11 @@ def main():
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if os.path.isdir(path_asm_test):
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run_assembly_from_dir(path_asm_test, args.iss_yaml, args.isa, args.mabi,
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gcc_opts, args.iss, output_dir,
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args.core_setting_dir, args.debug)
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args.core_setting_dir, args.debug, args.priv)
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# path_asm_test is an assembly file
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elif os.path.isfile(path_asm_test):
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run_assembly(path_asm_test, args.iss_yaml, args.isa, args.target, args.mabi, gcc_opts,
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args.iss, output_dir, args.core_setting_dir, args.debug, args.linker)
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args.iss, output_dir, args.core_setting_dir, args.debug, args.linker, args.priv)
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else:
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if not args.debug:
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logging.error('%s does not exist' % path_asm_test)
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@ -1247,11 +1251,11 @@ def main():
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if os.path.isdir(path_c_test):
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run_c_from_dir(path_c_test, args.iss_yaml, args.isa, args.mabi,
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gcc_opts, args.iss, output_dir,
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args.core_setting_dir, args.debug)
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args.core_setting_dir, args.debug, args.priv)
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# path_c_test is a C file
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elif os.path.isfile(path_c_test):
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run_c(path_c_test, args.iss_yaml, args.isa, args.target, args.mabi, gcc_opts,
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args.iss, output_dir, args.core_setting_dir, args.debug, args.linker)
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args.iss, output_dir, args.core_setting_dir, args.debug, args.linker, args.priv)
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else:
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if not args.debug:
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logging.error('%s does not exist' % path_c_test)
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@ -1269,7 +1273,7 @@ def main():
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# Run ISS simulation
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if args.steps == "all" or re.match(".*iss_sim.*", args.steps):
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iss_sim(matched_list, output_dir, args.iss, args.iss_yaml, args.iss_opts,
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args.isa, args.target, args.core_setting_dir, args.iss_timeout, args.debug)
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args.isa, args.target, args.core_setting_dir, args.iss_timeout, args.debug, args.priv)
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# Compare ISS simulation result
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if args.steps == "all" or re.match(".*iss_cmp.*", args.steps):
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@ -18,7 +18,7 @@
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# Always keep this value in sync with the settings of RTL simulators (cf.
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# <issrun_opts> values below).
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cmd: >
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make spike steps=2000000 variant=<variant> elf=<elf> tool_path=<tool_path> log=<log>
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make spike steps=2000000 variant=<variant> priv=<priv> elf=<elf> tool_path=<tool_path> log=<log>
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###############################################################################
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# Verilator
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