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https://github.com/openhwgroup/cva6.git
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Signed-off-by: André Sintzoff <andre.sintzoff@thalesgroup.com>
This commit is contained in:
parent
d0a4c9f82e
commit
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1 changed files with 4 additions and 3 deletions
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@ -505,7 +505,6 @@ module decoder import ariane_pkg::*; (
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{7'b000_0001, 3'b101}: instruction_o.op = ariane_pkg::DIVU;
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{7'b000_0001, 3'b110}: instruction_o.op = ariane_pkg::REM;
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{7'b000_0001, 3'b111}: instruction_o.op = ariane_pkg::REMU;
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{7'b000_0100, 3'b100}: instruction_o.op = ariane_pkg::ZEXTH;
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default: begin
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illegal_instr_non_bm = 1'b1;
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end
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@ -537,6 +536,8 @@ module decoder import ariane_pkg::*; (
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// Bitwise Shifting
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{7'b011_0000, 3'b001}: instruction_o.op = ariane_pkg::ROL; // rol
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{7'b011_0000, 3'b101}: instruction_o.op = ariane_pkg::ROR; // ror
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// Zero Extend Op
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{7'b000_0100, 3'b100}: instruction_o.op = ariane_pkg::ZEXTH;
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default: begin
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illegal_instr_bm = 1'b1;
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end
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@ -729,7 +730,7 @@ module decoder import ariane_pkg::*; (
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3'b000: instruction_o.op = ariane_pkg::SB;
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3'b001: instruction_o.op = ariane_pkg::SH;
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3'b010: instruction_o.op = ariane_pkg::SW;
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3'b011: if (riscv::XLEN==64) instruction_o.op = ariane_pkg::SD;
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3'b011: if (riscv::XLEN==64) instruction_o.op = ariane_pkg::SD;
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else illegal_instr = 1'b1;
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default: illegal_instr = 1'b1;
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endcase
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@ -748,7 +749,7 @@ module decoder import ariane_pkg::*; (
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3'b100: instruction_o.op = ariane_pkg::LBU;
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3'b101: instruction_o.op = ariane_pkg::LHU;
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3'b110: instruction_o.op = ariane_pkg::LWU;
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3'b011: if (riscv::XLEN==64) instruction_o.op = ariane_pkg::LD;
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3'b011: if (riscv::XLEN==64) instruction_o.op = ariane_pkg::LD;
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else illegal_instr = 1'b1;
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default: illegal_instr = 1'b1;
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endcase
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