mirror of
https://github.com/openhwgroup/cva6.git
synced 2025-04-22 21:27:10 -04:00
Create dedicated linker scripts for cv32a65x configuration. When another configuration is targeted, the default linker script is used (config/genxxx/linker/link.ld). When hwconfig is targeted, linker scripts are recopied into hwconfig directory.
Keep only one unique linker script: link.ldi. Remove test.ld file.
This commit is contained in:
Jean-Roch Coulon
JeanRochCoulon
parent
1d0076eec3
commit
9cfadbeded
16 changed files with 45 additions and 26 deletions
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@ -97,7 +97,7 @@ cd ./verif/sim
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python3 cva6.py --target cv32a60x --iss=$DV_SIMULATORS --iss_yaml=cva6.yaml \
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--c_tests ../tests/custom/hello_world/hello_world.c \
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--linker=../tests/custom/common/test.ld \
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--linker=../../config/gen_from_riscv_config/linker/link.ld \
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--gcc_opts="-static -mcmodel=medany -fvisibility=hidden -nostdlib \
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-nostartfiles -g ../tests/custom/common/syscalls.c \
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../tests/custom/common/crt.S -lgcc \
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@ -23,6 +23,7 @@ SECTIONS
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/* text: test code section */
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. = 0x80000000;
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_start_text = .;
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.text.init : { *(.text.init) }
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. = ALIGN(0x1000);
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@ -33,6 +34,18 @@ SECTIONS
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. = ALIGN(0x1000);
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.text : { *(.text) }
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. = ALIGN(0x1000);
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.text.startup : { *(.text.startup) }
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. = ALIGN(0x1000);
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_end_text = .;
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. = ALIGN(0x1000);
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.rodata : { *(.rodata*)}
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. = ALIGN(0x8);
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. = ALIGN(0x1000);
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.page_table : { *(.page_table) }
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.user_stack : { *(.user_stack) }
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.kernel_data : { *(.kernel_data) }
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.kernel_stack : { *(.kernel_stack) }
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/* data segment */
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.data : { *(.data) }
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@ -30,7 +30,7 @@ fi
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cd verif/sim/
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BDIR=../tests/riscv-tests/benchmarks/
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CVA6_FLAGS="--target $DV_TARGET --iss=$DV_SIMULATORS --iss_yaml cva6.yaml --linker ../tests/custom/common/test.ld"
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CVA6_FLAGS="--target $DV_TARGET --iss=$DV_SIMULATORS --iss_yaml cva6.yaml --linker ../../config/gen_from_riscv_config/linker/link.ld"
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GCC_COMMON_SRC=(
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../tests/custom/common/syscalls.c
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@ -60,7 +60,7 @@ for t in ${riscv_tests_list[@]} ; do
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[[ $? > 0 ]] && ((errors++))
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done
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python3 cva6.py --target ${DV_TARGET} --iss=$DV_SIMULATORS --iss_yaml=cva6.yaml --c_tests ../tests/custom/hello_world/hello_world.c --linker=../tests/custom/common/test.ld\
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python3 cva6.py --target ${DV_TARGET} --iss=$DV_SIMULATORS --iss_yaml=cva6.yaml --c_tests ../tests/custom/hello_world/hello_world.c --linker=../../config/gen_from_riscv_config/linker/link.ld\
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--gcc_opts="-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles -g ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -lgcc -I../tests/custom/env -I../tests/custom/common" $DV_OPTS
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[[ $? > 0 ]] && ((errors++))
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@ -64,7 +64,7 @@ for t in ${riscv_tests_list[@]} ; do
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done
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python3 cva6.py --target ${DV_TARGET} --iss=$DV_SIMULATORS --iss_yaml=cva6.yaml --c_tests ../tests/custom/hello_world/hello_world.c \
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--gcc_opts="-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles -g ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -I../tests/custom/env -I../tests/custom/common -T ../tests/custom/common/test.ld" $DV_OPTS
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--gcc_opts="-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles -g ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -I../tests/custom/env -I../tests/custom/common -T ../../config/gen_from_riscv_config/linker/link.ld" $DV_OPTS
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[[ $? > 0 ]] && ((errors++))
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make -C ../.. clean
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@ -42,10 +42,10 @@ export DV_OPTS="$DV_OPTS --issrun_opts=+debug_disable=1+UVM_VERBOSITY=$UVM_VERBO
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cd verif/sim/
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make -C ../.. clean
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make clean_all
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python3 cva6.py --testlist=../tests/testlist_cvxif.yaml --test cvxif_add_nop --iss_yaml cva6.yaml --target cv64a6_imafdc_sv39 --iss=$DV_SIMULATORS $DV_OPTS
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python3 cva6.py --testlist=../tests/testlist_cvxif.yaml --test cvxif_add_nop --iss_yaml cva6.yaml --target cv64a6_imafdc_sv39 --iss=$DV_SIMULATORS $DV_OPTS --linker=../../config/gen_from_riscv_config/linker/link.ld
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make -C ../.. clean
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make clean_all
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python3 cva6.py --testlist=../tests/testlist_cvxif.yaml --test cvxif_add_nop --iss_yaml cva6.yaml --target cv32a65x --iss=$DV_SIMULATORS $DV_OPTS
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python3 cva6.py --testlist=../tests/testlist_cvxif.yaml --test cvxif_add_nop --iss_yaml cva6.yaml --target cv32a65x --iss=$DV_SIMULATORS $DV_OPTS --linker=../../config/gen_from_riscv_config/cv32a65x/linker/link.ld
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make -C ../.. clean
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make clean_all
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@ -31,6 +31,6 @@ if ! [ -n "$DV_SIMULATORS" ]; then
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fi
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cd verif/sim/
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python3 cva6.py --testlist=../tests/testlist_csr_embedded.yaml --iss_yaml cva6.yaml --target $DV_TARGET --iss=$DV_SIMULATORS $DV_OPTS --priv=m --iss_timeout 600
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python3 cva6.py --testlist=../tests/testlist_csr_embedded.yaml --iss_yaml cva6.yaml --target $DV_TARGET --iss=$DV_SIMULATORS $DV_OPTS --priv=m --iss_timeout 600 --linker=../../config/gen_from_riscv_config/$DV_TARGET/linker/link.ld
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cd -
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@ -137,6 +137,6 @@ done
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j=0
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elif [[ "$list_num" = 0 ]];then
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printf "==== Execute Directed tests to improve functional coverage of isa, by hitting corners !!! ====\n\n"
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python3 cva6.py --testlist=$DIRECTED_TESTLIST --iss_yaml cva6.yaml --isa_extension="zcb" --target $DV_TARGET --iss=vcs-uvm,spike --priv=m
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python3 cva6.py --testlist=$DIRECTED_TESTLIST --iss_yaml cva6.yaml --isa_extension="zcb" --target $DV_TARGET --iss=vcs-uvm,spike --priv=m --linker=../../config/gen_from_riscv_config/$DV_TARGET/linker/link.ld
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fi
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cd -
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@ -103,6 +103,6 @@ done
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j=0
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elif [[ "$list_num" = 0 ]];then
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printf "==== Execute Directed tests to improve functional coverage of isa, by hitting corners !!! ====\n\n"
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python3 cva6.py --testlist=$DIRECTED_TESTLIST --iss_yaml cva6.yaml --target $DV_TARGET --iss=vcs-uvm,spike --priv=m
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python3 cva6.py --testlist=$DIRECTED_TESTLIST --iss_yaml cva6.yaml --target $DV_TARGET --iss=vcs-uvm,spike --priv=m --linker=../../config/gen_from_riscv_config/$DV_TARGET/linker/link.ld
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fi
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cd -
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@ -49,22 +49,21 @@ if [[ "$DV_SIMULATORS" != *"uvm"* ]]; then
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python3 cva6.py --testlist=../tests/testlist_riscv-compliance-cv64a6_imafdc_sv39.yaml --test rv32i-I-ADD-01 --iss_yaml cva6.yaml --target cv64a6_imafdc_sv39 --iss=$DV_SIMULATORS $DV_OPTS
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python3 cva6.py --testlist=../tests/testlist_riscv-tests-cv64a6_imafdc_sv39-v.yaml --test rv64ui-v-add --iss_yaml cva6.yaml --target cv64a6_imafdc_sv39 --iss=$DV_SIMULATORS $DV_OPTS
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python3 cva6.py --testlist=../tests/testlist_riscv-tests-cv64a6_imafdc_sv39-p.yaml --test rv64ui-p-add --iss_yaml cva6.yaml --target cv64a6_imafdc_sv39 --iss=$DV_SIMULATORS $DV_OPTS
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python3 cva6.py --testlist=../tests/testlist_riscv-arch-test-cv64a6_imafdc_sv39.yaml --test rv64i_m-add-01 --iss_yaml cva6.yaml --target cv64a6_imafdc_sv39 --iss=$DV_SIMULATORS $DV_OPTS --linker=../tests/riscv-arch-test/riscv-target/spike/link.ld
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python3 cva6.py --testlist=../tests/testlist_riscv-arch-test-cv64a6_imafdc_sv39.yaml --test rv64i_m-add-01 --iss_yaml cva6.yaml --target cv64a6_imafdc_sv39 --iss=$DV_SIMULATORS $DV_OPTS --linker=../../config/gen_from_riscv_config/cv32a6_imac_sv32/linker/link.ld
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python3 cva6.py --testlist=../tests/testlist_custom.yaml --test custom_test_template --iss_yaml cva6.yaml --target cv64a6_imafdc_sv39 --iss=$DV_SIMULATORS $DV_OPTS
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python3 cva6.py --c_tests ../tests/custom/hello_world/hello_world.c --iss_yaml cva6.yaml --target cv64a6_imafdc_sv39 --iss=$DV_SIMULATORS --gcc_opts="$CC_OPTS" $DV_OPTS --linker=../tests/custom/common/test.ld
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python3 cva6.py --c_tests ../tests/custom/hello_world/hello_world.c --iss_yaml cva6.yaml --target cv64a6_imafdc_sv39 --iss=$DV_SIMULATORS --gcc_opts="$CC_OPTS -nostdlib -lgcc" $DV_OPTS --linker=../../config/gen_from_riscv_config/cv64a6_imafdc_sv39/linker/test.ld
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make -C ../.. clean
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make clean_all
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python3 cva6.py --testlist=../tests/testlist_riscv-compliance-cv32a60x.yaml --test rv32i-I-ADD-01 --iss_yaml cva6.yaml --target cv32a6_imac_sv32 --iss=$DV_SIMULATORS $DV_OPTS
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python3 cva6.py --testlist=../tests/testlist_riscv-tests-cv32a60x-p.yaml --test rv32ui-p-add --iss_yaml cva6.yaml --target cv32a6_imac_sv32 --iss=$DV_SIMULATORS $DV_OPTS
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python3 cva6.py --testlist=../tests/testlist_riscv-arch-test-cv32a60x.yaml --test rv32im-cadd-01 --iss_yaml cva6.yaml --target cv32a6_imac_sv32 --iss=$DV_SIMULATORS $DV_OPTS --linker=../tests/riscv-arch-test/riscv-target/spike/link.ld
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python3 cva6.py --c_tests ../tests/custom/hello_world/hello_world.c --iss_yaml cva6.yaml --target cv32a6_imac_sv32 --iss=$DV_SIMULATORS --linker=../tests/custom/common/test.ld --gcc_opts="$CC_OPTS" $DV_OPTS
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python3 cva6.py --testlist=../tests/testlist_riscv-arch-test-cv32a60x.yaml --test rv32im-cadd-01 --iss_yaml cva6.yaml --target cv32a6_imac_sv32 --iss=$DV_SIMULATORS $DV_OPTS --linker=../../config/gen_from_riscv_config/cv32a6_imac_sv32/linker/link.ld
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python3 cva6.py --c_tests ../tests/custom/hello_world/hello_world.c --iss_yaml cva6.yaml --target cv32a6_imac_sv32 --iss=$DV_SIMULATORS --linker=../../config/gen_from_riscv_config/cv32a6_imac_sv32/linker/test.ld --gcc_opts="$CC_OPTS -nostdlib -lgcc" $DV_OPTS
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fi
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if [[ "$DV_SIMULATORS" == *"uvm"* ]]; then
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make -C ../.. clean
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make clean_all
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python3 cva6.py --c_tests ../tests/custom/hello_world/hello_world.c --iss_yaml cva6.yaml --target cv32a65x --iss=$DV_SIMULATORS --linker=../../config/gen_from_riscv_config/cv32a65x/linker/test.ld --gcc_opts="$CC_OPTS" $DV_OPTS
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fi
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make -C ../.. clean
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make clean_all
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python3 cva6.py --testlist=../tests/testlist_riscv-compliance-cv32a60x.yaml --test rv32i-I-ADD-01 --iss_yaml cva6.yaml --target cv32a65x --iss=$DV_SIMULATORS $DV_OPTS
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python3 cva6.py --testlist=../tests/testlist_riscv-tests-cv32a60x-p.yaml --test rv32ui-p-add --iss_yaml cva6.yaml --target cv32a65x --iss=$DV_SIMULATORS $DV_OPTS
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python3 cva6.py --testlist=../tests/testlist_riscv-arch-test-cv32a60x.yaml --test rv32im-cadd-01 --iss_yaml cva6.yaml --target cv32a65x --iss=$DV_SIMULATORS $DV_OPTS --linker=../tests/riscv-arch-test/riscv-target/spike/link.ld
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python3 cva6.py --c_tests ../tests/custom/hello_world/hello_world.c --iss_yaml cva6.yaml --target cv32a65x --iss=$DV_SIMULATORS --linker=../tests/custom/common/test.ld --gcc_opts="$CC_OPTS" $DV_OPTS
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make -C ../.. clean
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make clean_all
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@ -33,7 +33,7 @@ from dv.scripts.ovpsim_log_to_trace_csv import *
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from dv.scripts.whisper_log_trace_csv import *
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from dv.scripts.sail_log_to_trace_csv import *
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from dv.scripts.instr_trace_compare import *
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from pathlib import Path
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from types import SimpleNamespace
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LOGGER = logging.getLogger()
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@ -1016,7 +1016,11 @@ def load_config(args, cwd):
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args.simulator_yaml = cwd + "/cva6-simulator.yaml"
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if not args.linker:
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args.linker = cwd + "/link.ld"
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my_link = Path(cwd + f"/../../config/gen_from_riscv_config/{args.target}/linker/link.ld")
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if my_link.is_file():
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args.linker = cwd + f"/../../config/gen_from_riscv_config/{args.target}/linker/link.ld"
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else:
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args.linker = cwd + f"/../../config/gen_from_riscv_config/linker/link.ld"
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# Keep the core_setting_dir option to be backward compatible, suggest to use
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# --custom_target
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@ -1026,6 +1030,7 @@ def load_config(args, cwd):
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else:
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args.core_setting_dir = args.custom_target
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base = ""
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if not args.custom_target:
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if not args.testlist:
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args.testlist = cwd + "/target/"+ args.target +"/testlist.yaml"
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@ -1035,6 +1040,8 @@ def load_config(args, cwd):
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output_file = "../../core/include/hwconfig_config_pkg.sv"
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user_config.derive_config(input_file, output_file, changes)
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args.hwconfig_opts = user_config.get_config(output_file)
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os.system("mkdir -p ../../config/gen_from_riscv_config/hwconfig/linker")
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os.system("cp ../../config/gen_from_riscv_config/%s/linker/*.ld ../../config/gen_from_riscv_config/hwconfig/linker/" % (base))
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else:
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base = args.target
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if base in ("cv64a6_imafdc_sv39", "cv64a6_imafdc_sv39_hpdcache", "cv64a6_imafdc_sv39_wb"):
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@ -28,7 +28,7 @@
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common_test_config: &common_test_config
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path_var: TESTS_PATH
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gcc_opts: "-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -I../tests/custom/env -I../tests/custom/common -T ../tests/custom/common/test.ld -lgcc"
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gcc_opts: "-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -I../tests/custom/env -I../tests/custom/common -lgcc"
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testlist:
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- test: csr_test
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@ -28,11 +28,11 @@
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common_test_config: &common_test_config
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path_var: TESTS_PATH
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gcc_opts: "-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -I../tests/custom/env -I../tests/custom/common -T ../tests/custom/common/test.ld"
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gcc_opts: "-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -I../tests/custom/env -I../tests/custom/common"
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common_test_config_lgcc: &common_test_config_lgcc
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path_var: TESTS_PATH
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gcc_opts: "-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -I../tests/custom/env -I../tests/custom/common -T ../tests/custom/common/test.ld -lgcc"
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gcc_opts: "-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -I../tests/custom/env -I../tests/custom/common -lgcc"
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testlist:
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- test: cvxif_add_nop
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@ -28,7 +28,7 @@
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common_test_config: &common_test_config
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path_var: TESTS_PATH
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gcc_opts: "-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -I../tests/custom/env -I../tests/custom/common -T ../tests/custom/common/test.ld -lgcc"
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gcc_opts: "-static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -I../tests/custom/env -I../tests/custom/common -lgcc"
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testlist:
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- test: branch_test
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@ -32,7 +32,7 @@
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# --------------------------------------------------------------------------------
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common_test_config: &common_test_config
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path_var: TESTS_PATH
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gcc_opts: "-static -misa-spec=2.2 -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -I../tests/custom/env -I../tests/custom/common -T ../tests/custom/common/test.ld -lgcc"
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gcc_opts: "-static -misa-spec=2.2 -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles ../tests/custom/common/syscalls.c ../tests/custom/common/crt.S -I../tests/custom/env -I../tests/custom/common -T ../../config/gen_from_riscv_config/linker/link.ld -lgcc"
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testlist:
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- test: compressed-fpreg-commits-rv64
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