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Fix PMPCFG number (from 8 to 4, from which 2 are read-only zero) (#2232)

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JeanRochCoulon 2024-06-11 11:15:27 +02:00 • committed by GitHub
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commit 9d02734bd1
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3 changed files with 87 additions and 6 deletions
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9
docs/06_cv32a65x_riscv/priv-isa-cv32a65x.html
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79
docs/06_cv32a65x_riscv/src/images/bytefield/pmp-rv32.adoc Normal file
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@ -0,0 +1,79 @@
[bytefield]
----
(defattrs :plain [:plain {:font-family "M+ 1p Fallback"}])
(def row-header-fn nil)
(def boxes-per-row 20)
(def left-margin 200)
(def right-margin 200)
(draw-box "31" {:span 2 :text-anchor "start" :borders {}})
(draw-box "24" {:span 2 :text-anchor "end" :borders {}})
(draw-box "23" {:span 2 :text-anchor "start" :borders {}})
(draw-box "16" {:span 2 :text-anchor "end" :borders {}})
(draw-box "15" {:span 2 :text-anchor "start" :borders {}})
(draw-box "8" {:span 2 :text-anchor "end" :borders {}})
(draw-box "7" {:span 2 :text-anchor "start" :borders {}})
(draw-box "0" {:span 2 :text-anchor "end" :borders {}})
(draw-box nil {:span 4 :text-anchor "start" :borders {}})
(draw-box "pmp3cfg" {:span 4})
(draw-box "pmp2cfg" {:span 4})
(draw-box "pmp1cfg" {:span 4})
(draw-box "pmp0cfg" {:span 4})
(draw-box "pmpcfg0" {:span 4 :borders {}})
(draw-box "8" {:span 4 :borders {}})
(draw-box "8" {:span 4 :borders {}})
(draw-box "8" {:span 4 :borders {}})
(draw-box "8" {:span 4 :borders {}})
(draw-box nil {:span 4 :borders {}})
(draw-box "31" {:span 2 :text-anchor "start" :borders {}})
(draw-box "24" {:span 2 :text-anchor "end" :borders {}})
(draw-box "23" {:span 2 :text-anchor "start" :borders {}})
(draw-box "16" {:span 2 :text-anchor "end" :borders {}})
(draw-box "15" {:span 2 :text-anchor "start" :borders {}})
(draw-box "8" {:span 2 :text-anchor "end" :borders {}})
(draw-box "7" {:span 2 :text-anchor "start" :borders {}})
(draw-box "0" {:span 2 :text-anchor "end" :borders {}})
(draw-box nil {:span 4 :text-anchor "start" :borders {}})
(draw-box "pmp7cfg" {:span 4})
(draw-box "pmp6cfg" {:span 4})
(draw-box "pmp5cfg" {:span 4})
(draw-box "pmp4cfg" {:span 4})
(draw-box "pmpcfg1" {:span 4 :borders {}})
(draw-box "8" {:span 4 :borders {}})
(draw-box "8" {:span 4 :borders {}})
(draw-box "8" {:span 4 :borders {}})
(draw-box "8" {:span 4 :borders {}})
(draw-box nil {:span 4 :borders {}})
(draw-box nil {:span 20 :borders {}})
(draw-box nil {:span 8 :borders {}})
(draw-box "⋮" {:span 12 :text-anchor "start" :borders {}})
(draw-box nil {:span 20 :borders {}})
(draw-box "31" {:span 2 :text-anchor "start" :borders {}})
(draw-box "24" {:span 2 :text-anchor "end" :borders {}})
(draw-box "23" {:span 2 :text-anchor "start" :borders {}})
(draw-box "16" {:span 2 :text-anchor "end" :borders {}})
(draw-box "15" {:span 2 :text-anchor "start" :borders {}})
(draw-box "8" {:span 2 :text-anchor "end" :borders {}})
(draw-box "7" {:span 2 :text-anchor "start" :borders {}})
(draw-box "0" {:span 2 :text-anchor "end" :borders {}})
(draw-box nil {:span 4 :text-anchor "start" :borders {}})
(draw-box "pmp15cfg" {:span 4})
(draw-box "pmp14cfg" {:span 4})
(draw-box "pmp13cfg" {:span 4})
(draw-box "pmp12cfg" {:span 4})
(draw-box "pmpcfg3" {:span 4 :borders {}})
(draw-box "8" {:span 4 :borders {}})
(draw-box "8" {:span 4 :borders {}})
(draw-box "8" {:span 4 :borders {}})
(draw-box "8" {:span 4 :borders {}})
(draw-box nil {:span 4 :borders {}})
----

5
docs/06_cv32a65x_riscv/src/machine.adoc
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@ -3776,9 +3776,10 @@ implemented first. All PMP CSR fields are *WARL* and 8 upper entries are
read-only zero. PMP CSRs are only accessible to M-mode.
[{ohg-config}] The PMP configuration registers are densely packed into CSRs to minimize
context-switch time. For {ohg-config} with sixteen CSRs, `pmpcfg0`–`pmpcfg15`, hold
context-switch time. For {ohg-config} with sixteen CSRs, `pmpcfg0`–`pmpcfg3`, hold
the configurations as shown
in <<pmpcfg-rv32>>.
The 2 upper entries are read-only zero.
[[pmpcfg-rv32]]
.RV32 PMP configuration CSR layout.
@ -3788,7 +3789,7 @@ include::images/bytefield/pmp-rv32.adoc[]
PMP address register encodes bits 33-2 of a 34-bit physical address for
RV32, as shown in <<pmpaddr-rv32>>. Not all
physical address bits may be implemented, and so the `pmpaddr` registers
are *WARL*. (TODO which bits are implemented)
are *WARL*.
[[pmpaddr-rv32]]
.PMP address register format, RV32.