github-mirrors/cva6
1
0
Fork 0
mirror of https://github.com/openhwgroup/cva6.git synced 2025-04-22 05:07:21 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions 5

💚 Fix scoreboard tb with exception WB

Browse source
This commit is contained in:
Florian Zaruba 2017-05-04 14:46:00 +02:00
parent a5bb4c262f
commit a8336838e2
2 changed files with 6 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

5
tb/agents/scoreboard_if/scoreboard_if.sv
View file

@ -31,17 +31,18 @@ interface scoreboard_if #(parameter int NR_WB_PORTS = 1)(input clk);
wire issue_ack;
wire [NR_WB_PORTS-1:0][TRANS_ID_BITS-1:0] trans_id;
wire [NR_WB_PORTS-1:0][63:0] wdata;
wire [NR_WB_PORTS-1:0][$bits(exception)-1:0] ex;
wire [NR_WB_PORTS-1:0] wb_valid;
// Scoreboard interface configured as master
clocking mck @(posedge clk);
default input #1 output #5; // save timing
output flush, rs1_address, rs2_address, commit_ack, decoded_instr, decoded_instr_valid, issue_ack, trans_id, wdata, wb_valid;
output flush, rs1_address, rs2_address, commit_ack, decoded_instr, decoded_instr_valid, issue_ack, trans_id, wdata, ex, wb_valid;
input full, rd_clobber, rs1, rs1_valid, rs2, rs2_valid, commit_instr, issue_instr, issue_instr_valid;
endclocking
// Scoreboard interface configured in passive mode (-> monitor)
clocking pck @(posedge clk);
input flush, rs1_address, rs2_address, commit_ack, decoded_instr, decoded_instr_valid, issue_ack, trans_id, wdata, wb_valid,
input flush, rs1_address, rs2_address, commit_ack, decoded_instr, decoded_instr_valid, issue_ack, trans_id, wdata, ex, wb_valid,
full, rd_clobber, rs1, rs1_valid, rs2, rs2_valid, commit_instr, issue_instr, issue_instr_valid;
endclocking

3
tb/scoreboard_tb.sv
View file

@ -44,6 +44,7 @@ module scoreboard_tb;
.issue_ack_i ( scoreboard_if.issue_ack ),
.trans_id_i ( scoreboard_if.trans_id ),
.wdata_i ( scoreboard_if.wdata ),
.ex_i ( scoreboard_if.ex ),
.wb_valid_i ( scoreboard_if.wb_valid )
);
@ -127,6 +128,8 @@ module scoreboard_tb;
scoreboard_if.mck.trans_id <= trans_id;
scoreboard_if.mck.wdata <= random_data;
scoreboard_if.mck.wb_valid <= 1'b1;
// so far no exception testing
scoreboard_if.mck.ex <= '{default: 0};
// $display("Write Back: %0h", random_data);
sb.write_back(trans_id, random_data);
@(scoreboard_if.mck);