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cache_ctrl: Generalise AXI offset generation (#2573)

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For `XLEN = 64`, some tools (e.g. VCS) still elaborate the offset generation block for `XLEN = 32`, throwing an elaboration error (illegal bit access). Fix this by generating the AXI offset in an equivalent, parameter-agnostic and tool-friendly way.
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Nils Wistoff 2024-11-04 19:24:57 +11:00 • committed by GitHub
parent 9e670f64c6
commit aeb0b646bf
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1 changed files with 2 additions and 6 deletions
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8
core/cache_subsystem/cache_ctrl.sv
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@ -117,7 +117,8 @@ module cache_ctrl
// cache-line offset -> multiple of XLEN
cl_offset = mem_req_q.index[CVA6Cfg.DCACHE_OFFSET_WIDTH-1:$clog2(CVA6Cfg.XLEN/8)] <<
$clog2(CVA6Cfg.XLEN); // shift by log2(XLEN) to the left
axi_offset = '0;
// XLEN offset within AXI request
axi_offset = (mem_req_q.index >> $clog2(CVA6Cfg.XLEN / 8)) << $clog2(CVA6Cfg.XLEN);
// default assignments
state_d = state_q;
mem_req_d = mem_req_q;
@ -138,11 +139,6 @@ module cache_ctrl
mem_req_d.killed |= req_port_i.kill_req;
if (CVA6Cfg.XLEN == 32) begin
axi_offset = mem_req_q.index[$clog2(CVA6Cfg.AxiDataWidth/8)-1:$clog2(CVA6Cfg.XLEN/8)] <<
$clog2(CVA6Cfg.XLEN);
end
case (state_q)
IDLE: begin