mirror of
https://github.com/openhwgroup/cva6.git
synced 2025-04-24 14:17:16 -04:00
Fix RVFI rs1/rs2 len from VLEN to XLEN (#2749)
RVFI rs1 and rs2 operands were VLEN, it has been fixed to be XLEN.
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parent
3e8eb88e88
commit
be5ac20e46
6 changed files with 39 additions and 30 deletions
10
core/cva6.sv
10
core/cva6.sv
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@ -418,6 +418,8 @@ module cva6
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// --------------
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logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.VLEN-1:0] rs1_forwarding_id_ex; // unregistered version of fu_data_o.operanda
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logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.VLEN-1:0] rs2_forwarding_id_ex; // unregistered version of fu_data_o.operandb
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logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.XLEN-1:0] rvfi_rs1;
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logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.XLEN-1:0] rvfi_rs2;
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fu_data_t [CVA6Cfg.NrIssuePorts-1:0] fu_data_id_ex;
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logic [CVA6Cfg.VLEN-1:0] pc_id_ex;
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@ -898,7 +900,9 @@ module cva6
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.stall_issue_o (stall_issue),
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//RVFI
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.rvfi_issue_pointer_o (rvfi_issue_pointer),
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.rvfi_commit_pointer_o(rvfi_commit_pointer)
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.rvfi_commit_pointer_o(rvfi_commit_pointer),
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.rvfi_rs1_o (rvfi_rs1),
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.rvfi_rs2_o (rvfi_rs2)
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);
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// ---------
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@ -1751,8 +1755,8 @@ module cva6
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.decoded_instr_valid_i (issue_entry_valid_id_issue),
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.decoded_instr_ack_i (issue_instr_issue_id),
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.rs1_forwarding_i(rs1_forwarding_id_ex),
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.rs2_forwarding_i(rs2_forwarding_id_ex),
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.rs1_i(rvfi_rs1),
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.rs2_i(rvfi_rs2),
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.commit_instr_i(commit_instr_id_commit),
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.commit_drop_i (commit_drop_id_commit),
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@ -64,8 +64,8 @@ module cva6_rvfi
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logic [CVA6Cfg.NrIssuePorts-1:0] decoded_instr_valid;
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logic [CVA6Cfg.NrIssuePorts-1:0] decoded_instr_ack;
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logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.XLEN-1:0] rs1_forwarding;
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logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.XLEN-1:0] rs2_forwarding;
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logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.XLEN-1:0] rs1;
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logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.XLEN-1:0] rs2;
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logic [CVA6Cfg.NrCommitPorts-1:0][CVA6Cfg.XLEN-1:0] rvfi_intr;
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@ -132,8 +132,8 @@ module cva6_rvfi
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assign decoded_instr_valid = instr.decoded_instr_valid;
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assign decoded_instr_ack = instr.decoded_instr_ack;
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assign rs1_forwarding = instr.rs1_forwarding;
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assign rs2_forwarding = instr.rs2_forwarding;
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assign rs1 = instr.rs1;
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assign rs2 = instr.rs2;
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assign commit_instr_pc = instr.commit_instr_pc;
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assign commit_instr_op = instr.commit_instr_op;
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@ -240,8 +240,8 @@ module cva6_rvfi
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for (int unsigned i = 0; i < CVA6Cfg.NrIssuePorts; i++) begin
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if (decoded_instr_valid[i] && decoded_instr_ack[i] && !flush_unissued_instr) begin
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mem_n[issue_pointer[i]] = '{
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rs1_rdata: rs1_forwarding[i],
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rs2_rdata: rs2_forwarding[i],
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rs1_rdata: rs1[i],
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rs2_rdata: rs2[i],
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lsu_addr: '0,
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lsu_rmask: '0,
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lsu_wmask: '0,
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@ -35,8 +35,8 @@ module cva6_rvfi_probes
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input logic [CVA6Cfg.NrIssuePorts-1:0] decoded_instr_valid_i,
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input logic [CVA6Cfg.NrIssuePorts-1:0] decoded_instr_ack_i,
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input logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.VLEN-1:0] rs1_forwarding_i,
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input logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.VLEN-1:0] rs2_forwarding_i,
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input logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.VLEN-1:0] rs1_i,
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input logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.VLEN-1:0] rs2_i,
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input scoreboard_entry_t [CVA6Cfg.NrCommitPorts-1:0] commit_instr_i,
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input logic [CVA6Cfg.NrCommitPorts-1:0] commit_drop_i,
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@ -76,8 +76,8 @@ module cva6_rvfi_probes
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instr.decoded_instr_valid = decoded_instr_valid_i;
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instr.decoded_instr_ack = decoded_instr_ack_i;
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instr.rs1_forwarding = rs1_forwarding_i;
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instr.rs2_forwarding = rs2_forwarding_i;
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instr.rs1 = rs1_i;
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instr.rs2 = rs2_i;
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instr.ex_commit_cause = ex_commit_i.cause;
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instr.ex_commit_valid = ex_commit_i.valid;
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@ -104,8 +104,8 @@
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logic [Cfg.NrIssuePorts-1:0] fetch_entry_valid; \
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logic [Cfg.NrIssuePorts-1:0][31:0] instruction; \
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logic [Cfg.NrIssuePorts-1:0] is_compressed; \
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logic [Cfg.NrIssuePorts-1:0][Cfg.VLEN-1:0] rs1_forwarding; \
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logic [Cfg.NrIssuePorts-1:0][Cfg.VLEN-1:0] rs2_forwarding; \
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logic [Cfg.NrIssuePorts-1:0][Cfg.XLEN-1:0] rs1; \
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logic [Cfg.NrIssuePorts-1:0][Cfg.XLEN-1:0] rs2; \
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logic [Cfg.NrCommitPorts-1:0][Cfg.VLEN-1:0] commit_instr_pc; \
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ariane_pkg::fu_op [Cfg.NrCommitPorts-1:0] commit_instr_op; \
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logic [Cfg.NrCommitPorts-1:0][ariane_pkg::REG_ADDR_SIZE-1:0] commit_instr_rs1; \
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@ -51,9 +51,9 @@ module issue_read_operands
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// FU data useful to execute instruction - EX_STAGE
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output fu_data_t [CVA6Cfg.NrIssuePorts-1:0] fu_data_o,
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// Unregistered version of fu_data_o.operanda - EX_STAGE
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output logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.XLEN-1:0] rs1_forwarding_o,
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output logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.VLEN-1:0] rs1_forwarding_o,
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// Unregistered version of fu_data_o.operandb - EX_STAGE
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output logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.XLEN-1:0] rs2_forwarding_o,
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output logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.VLEN-1:0] rs2_forwarding_o,
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// Program Counter - EX_STAGE
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output logic [CVA6Cfg.VLEN-1:0] pc_o,
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// Is zcmt - EX_STAGE
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@ -122,7 +122,12 @@ module issue_read_operands
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// FPR write enable - COMMIT_STAGE
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input logic [CVA6Cfg.NrCommitPorts-1:0] we_fpr_i,
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// Issue stall - PERF_COUNTERS
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output logic stall_issue_o
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output logic stall_issue_o,
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// Information dedicated to RVFI - RVFI
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output logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.XLEN-1:0] rvfi_rs1_o,
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// Information dedicated to RVFI - RVFI
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output logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.XLEN-1:0] rvfi_rs2_o
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);
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localparam OPERANDS_PER_INSTR = CVA6Cfg.NrRgprPorts / CVA6Cfg.NrIssuePorts;
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@ -253,6 +258,8 @@ module issue_read_operands
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for (genvar i = 0; i < CVA6Cfg.NrIssuePorts; i++) begin
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assign rs1_forwarding_o[i] = fu_data_n[i].operand_a[CVA6Cfg.VLEN-1:0]; //forwarding or unregistered rs1 value
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assign rs2_forwarding_o[i] = fu_data_n[i].operand_b[CVA6Cfg.VLEN-1:0]; //forwarding or unregistered rs2 value
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assign rvfi_rs1_o[i] = fu_data_n[i].operand_a;
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assign rvfi_rs2_o[i] = fu_data_n[i].operand_b;
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end
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assign fu_data_o = fu_data_q;
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@ -159,7 +159,11 @@ module issue_stage
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// Information dedicated to RVFI - RVFI
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output logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.TRANS_ID_BITS-1:0] rvfi_issue_pointer_o,
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// Information dedicated to RVFI - RVFI
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output logic [CVA6Cfg.NrCommitPorts-1:0][CVA6Cfg.TRANS_ID_BITS-1:0] rvfi_commit_pointer_o
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output logic [CVA6Cfg.NrCommitPorts-1:0][CVA6Cfg.TRANS_ID_BITS-1:0] rvfi_commit_pointer_o,
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// Information dedicated to RVFI - RVFI
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output logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.XLEN-1:0] rvfi_rs1_o,
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// Information dedicated to RVFI - RVFI
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output logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.XLEN-1:0] rvfi_rs2_o
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);
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// ---------------------------------------------------
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// Scoreboard (SB) <-> Issue and Read Operands (IRO)
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@ -178,14 +182,6 @@ module issue_stage
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logic [CVA6Cfg.NrIssuePorts-1:0] issue_instr_valid_sb_iro;
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logic [CVA6Cfg.NrIssuePorts-1:0] issue_ack_iro_sb;
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logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.XLEN-1:0] rs1_forwarding_xlen;
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logic [CVA6Cfg.NrIssuePorts-1:0][CVA6Cfg.XLEN-1:0] rs2_forwarding_xlen;
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for (genvar i = 0; i < CVA6Cfg.NrIssuePorts; i++) begin
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assign rs1_forwarding_o[i] = rs1_forwarding_xlen[i][CVA6Cfg.VLEN-1:0];
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assign rs2_forwarding_o[i] = rs2_forwarding_xlen[i][CVA6Cfg.VLEN-1:0];
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end
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assign issue_instr_o = issue_instr_sb_iro[0];
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assign issue_instr_hs_o = issue_instr_valid_sb_iro[0] & issue_ack_iro_sb[0];
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@ -262,8 +258,8 @@ module issue_stage
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.issue_ack_o (issue_ack_iro_sb),
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.fwd_i (fwd),
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.fu_data_o (fu_data_o),
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.rs1_forwarding_o (rs1_forwarding_xlen),
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.rs2_forwarding_o (rs2_forwarding_xlen),
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.rs1_forwarding_o (rs1_forwarding_o),
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.rs2_forwarding_o (rs2_forwarding_o),
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.pc_o,
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.is_zcmt_o,
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.is_compressed_instr_o,
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@ -302,7 +298,9 @@ module issue_stage
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.wdata_i,
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.we_gpr_i,
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.we_fpr_i,
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.stall_issue_o
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.stall_issue_o,
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.rvfi_rs1_o (rvfi_rs1_o),
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.rvfi_rs2_o (rvfi_rs2_o)
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);
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endmodule
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