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Various improvement for code coverage (#2846)
decoder improvement, removing of CVXIF RAW, store_buffer improvement
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parent
42eea3fe38
commit
c87b3e6adc
3 changed files with 7 additions and 22 deletions
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@ -1612,7 +1612,8 @@ module decoder
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instruction_o.ex.cause = (CVA6Cfg.RVH && v_i) ? riscv::ENV_CALL_VSMODE : riscv::ENV_CALL_SMODE;
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instruction_o.ex.cause = (CVA6Cfg.RVH && v_i) ? riscv::ENV_CALL_VSMODE : riscv::ENV_CALL_SMODE;
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end else if (priv_lvl_i == riscv::PRIV_LVL_U && CVA6Cfg.RVU) begin
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end else if (priv_lvl_i == riscv::PRIV_LVL_U && CVA6Cfg.RVU) begin
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instruction_o.ex.cause = riscv::ENV_CALL_UMODE;
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instruction_o.ex.cause = riscv::ENV_CALL_UMODE;
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end else if (priv_lvl_i == riscv::PRIV_LVL_M) begin
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// we are in M-mode
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end else begin
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instruction_o.ex.cause = riscv::ENV_CALL_MMODE;
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instruction_o.ex.cause = riscv::ENV_CALL_MMODE;
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end
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end
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end else if (ebreak) begin
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end else if (ebreak) begin
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@ -674,24 +674,6 @@ module issue_read_operands
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end
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end
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end
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end
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if (CVA6Cfg.CvxifEn) begin
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// Remove unecessary forward and stall in case source register is not needed by coprocessor.
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if (x_issue_valid_o && x_issue_resp_i.accept) begin
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if (~x_issue_resp_i.register_read[0]) begin
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forward_rs1[0] = 1'b0;
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stall_rs1[0] = 1'b0;
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end
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if (~x_issue_resp_i.register_read[1]) begin
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forward_rs2[0] = 1'b0;
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stall_rs2[0] = 1'b0;
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end
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if (OPERANDS_PER_INSTR == 3 && ~x_issue_resp_i.register_read[2]) begin
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forward_rs3[0] = 1'b0;
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stall_rs3[0] = 1'b0;
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end
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end
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stall_raw[0] = x_transaction_rejected ? 1'b0 : stall_rs1[0] || stall_rs2[0] || (CVA6Cfg.NrRgprPorts == 3 && stall_rs3[0]);
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end
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if (CVA6Cfg.SuperscalarEn) begin
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if (CVA6Cfg.SuperscalarEn) begin
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if (!issue_instr_i[1].use_zimm && (!CVA6Cfg.FpPresent || (is_rs1_fpr(
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if (!issue_instr_i[1].use_zimm && (!CVA6Cfg.FpPresent || (is_rs1_fpr(
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@ -194,9 +194,11 @@ module store_buffer
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commit_read_pointer_n = commit_read_pointer_q + 1'b1;
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commit_read_pointer_n = commit_read_pointer_q + 1'b1;
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commit_status_cnt--;
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commit_status_cnt--;
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end
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end
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end else if (commit_i && speculative_queue_q[speculative_read_pointer_q].valid && (commit_write_pointer_q == speculative_read_pointer_q) && !stall_st_pending_i) begin
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end else if (speculative_queue_q[speculative_read_pointer_q].valid) begin
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obi_store_req_o.req = 1'b1;
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if (commit_i && (commit_write_pointer_q == speculative_read_pointer_q) && !stall_st_pending_i) begin
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direct_req_from_speculative = 1'b1;
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obi_store_req_o.req = 1'b1;
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direct_req_from_speculative = 1'b1;
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end
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end
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end
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// we ignore the rvalid signal for now as we assume that the store
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// we ignore the rvalid signal for now as we assume that the store
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// happened if we got a grant
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// happened if we got a grant
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