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mmu: Use latched value to determine if misaligned exception occurred (#2802)
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Adds to #2798. Sorry for noticing this only now. Together with #2798, this reverts a bug that was introduced in #2528.

Signed-off-by: Nils Wistoff <nwistoff@iis.ee.ethz.ch>
This commit is contained in:
Nils Wistoff 2025-03-01 09:50:35 +11:00 • committed by GitHub
parent ab89beaebb
commit d971232cd7
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1 changed files with 4 additions and 1 deletions
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core/cva6_mmu/cva6_mmu.sv
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@ -515,6 +515,9 @@ module cva6_mmu
lsu_valid_o = lsu_req_q;
lsu_exception_o = misaligned_ex_q;
// mute misaligned exceptions if there is no request otherwise they will throw accidental exceptions
misaligned_ex_n.valid = misaligned_ex_i.valid & lsu_req_i;
// we work with SV39 or SV32, so if VM is enabled, check that all bits [CVA6Cfg.VLEN-1:CVA6Cfg.SV-1] are equal to bit [CVA6Cfg.SV]
canonical_addr_check = (lsu_req_i && en_ld_st_translation_i &&
!((&lsu_vaddr_i[CVA6Cfg.VLEN-1:CVA6Cfg.SV-1]) == 1'b1 || (|lsu_vaddr_i[CVA6Cfg.VLEN-1:CVA6Cfg.SV-1]) == 1'b0));
@ -538,7 +541,7 @@ module cva6_mmu
lsu_dtlb_ppn_o = (CVA6Cfg.PPNW)'(lsu_vaddr_n[((CVA6Cfg.PLEN > CVA6Cfg.VLEN) ? CVA6Cfg.VLEN -1: CVA6Cfg.PLEN -1 ):12]);
// translation is enabled and no misaligned exception occurred
if ((en_ld_st_translation_i || en_ld_st_g_translation_i) && !misaligned_ex_i.valid) begin
if ((en_ld_st_translation_i || en_ld_st_g_translation_i) && !misaligned_ex_q.valid) begin
lsu_valid_o = 1'b0;
lsu_dtlb_ppn_o = (en_ld_st_g_translation_i && CVA6Cfg.RVH)? dtlb_g_content.ppn :dtlb_content.ppn;