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Restructuring tb, more ready for UVM port
This commit is contained in:
Florian Zaruba
parent
7ee4add5b6
commit
f3f136a382
2 changed files with 199 additions and 120 deletions
56
tb/models/scoreboard.sv
Executable file
56
tb/models/scoreboard.sv
Executable file
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@ -0,0 +1,56 @@
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class Scoreboard;
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scoreboard_entry decoded_instructions[$];
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scoreboard_entry issued_instructions[$];
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static integer unsigned pc = 0;
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// utility function to get randomized input data
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static function automatic scoreboard_entry randomize_scoreboard();
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exception exception = { 64'h55, 63'h0, 1'b0};
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scoreboard_entry entry = {
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pc, ALU, ADD, 5'h5, 5'h5, 5'h5, 64'h0, 1'b0, 1'b0, exception
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};
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pc++;
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return entry;
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endfunction : randomize_scoreboard
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// just allow one operation
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function void submit_instruction(scoreboard_entry entry);
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decoded_instructions.push_back(entry);
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endfunction : submit_instruction
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// get the current issue instruction
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function scoreboard_entry get_issue();
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scoreboard_entry issue = decoded_instructions.pop_front();
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issued_instructions.push_back(issue);
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return issue;
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endfunction : get_issue
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// write back to scoreboard
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function void write_back(logic [63:0] pc, logic [63:0] value);
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for (int i = 0; i < $size(issued_instructions); i++) begin
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if (issued_instructions[i].pc == pc) begin
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issued_instructions[i].valid = 1'b1;
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issued_instructions[i].result = value;
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end
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end
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endfunction : write_back
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// // commit the instruction, e.g.: delete it from the entries
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function scoreboard_entry commit();
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return issued_instructions.pop_front();
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endfunction : commit
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// return the clobbered registers
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function logic [31:0][$bits(fu_t)-1:0] get_clobber();
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logic [31:0][$bits(fu_t)-1:0] result;
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for (int i = 0; i < $size(issued_instructions); i++) begin
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if (issued_instructions[i].rd != 5'h0) begin
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result[issued_instructions[i].rd] = issued_instructions[i].fu;
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end
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end
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return result;
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endfunction : get_clobber
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endclass : Scoreboard
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@ -7,58 +7,40 @@
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// All rights reserved.
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//
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// TODO, test register read and clobber interface, make a proper TB out of it
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module scoreboard_tb;
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import uvm_pkg::*;
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import ariane_pkg::*;
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logic rst_ni, clk;
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scoreboard_entry scoreboard_queue[$];
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scoreboard_entry temp_scoreboard_entry;
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scoreboard_entry comp;
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semaphore wb_lock = new(1);
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module scoreboard_tb;
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integer unsigned pc = 0;
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`include "models/scoreboard.sv"
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scoreboard_if scoreboard_if (clk);
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logic rst_ni, clk;
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scoreboard_if scoreboard_if (clk);
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scoreboard dut (
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.clk_i ( clk ),
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.rst_ni ( rst_ni ),
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.full_o ( scoreboard_if.full ),
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.flush_i ( scoreboard_if.flush ),
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.rd_clobber_o ( scoreboard_if.rd_clobber ),
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.rs1_i ( scoreboard_if.rs1_address ),
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.rs1_o ( scoreboard_if.rs1 ),
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.rs1_valid_o ( scoreboard_if.rs1_valid ),
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.rs2_i ( scoreboard_if.rs2_address ),
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.rs2_o ( scoreboard_if.rs2 ),
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.rs2_valid_o ( scoreboard_if.rs2_valid ),
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.commit_instr_o ( scoreboard_if.commit_instr ),
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.commit_ack_i ( scoreboard_if.commit_ack ),
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.decoded_instr_i ( scoreboard_if.decoded_instr ),
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.decoded_instr_valid_i( scoreboard_if.decoded_instr_valid ),
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.issue_instr_o ( scoreboard_if.issue_instr ),
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.issue_instr_valid_o ( scoreboard_if.issue_instr_valid ),
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.issue_ack_i ( scoreboard_if.issue_ack ),
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.pc_i ( scoreboard_if.pc ),
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.wdata_i ( scoreboard_if.wdata ),
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.wb_valid_i ( scoreboard_if.wb_valid )
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);
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function automatic scoreboard_entry randomize_scoreboard();
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exception exception = { 64'h55, 63'h0, 1'b0};
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scoreboard_entry entry = {
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pc, ALU, ADD, 5'h5, 5'h5, 5'h5, 64'h0, 1'b0, 1'b0, exception
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};
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pc++;
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return entry;
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endfunction : randomize_scoreboard
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initial begin
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// register the scoreboard interface
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// uvm_config_db #(virtual scoreboard_if)::set(null, "uvm_test_top", "scoreboard_vif", scoreboard_if);
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end
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scoreboard dut (
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.clk_i ( clk ),
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.rst_ni ( rst_ni ),
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.full_o ( scoreboard_if.full ),
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.flush_i ( scoreboard_if.flush ),
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.rd_clobber_o ( scoreboard_if.rd_clobber ),
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.rs1_i ( scoreboard_if.rs1_address ),
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.rs1_o ( scoreboard_if.rs1 ),
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.rs1_valid_o ( scoreboard_if.rs1_valid ),
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.rs2_i ( scoreboard_if.rs2_address ),
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.rs2_o ( scoreboard_if.rs2 ),
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.rs2_valid_o ( scoreboard_if.rs2_valid ),
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.commit_instr_o ( scoreboard_if.commit_instr ),
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.commit_ack_i ( scoreboard_if.commit_ack ),
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.decoded_instr_i ( scoreboard_if.decoded_instr ),
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.decoded_instr_valid_i( scoreboard_if.decoded_instr_valid ),
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.issue_instr_o ( scoreboard_if.issue_instr ),
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.issue_instr_valid_o ( scoreboard_if.issue_instr_valid ),
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.issue_ack_i ( scoreboard_if.issue_ack ),
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.pc_i ( scoreboard_if.pc ),
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.wdata_i ( scoreboard_if.wdata ),
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.wb_valid_i ( scoreboard_if.wb_valid )
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);
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initial begin
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clk = 1'b0;
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@ -71,88 +53,129 @@ scoreboard dut (
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#10ns clk = ~clk;
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end
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// push new decoded instructions
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initial begin
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wait(rst_ni == 1'b1);
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// load the scoreboard until it is full
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forever begin
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program testbench (scoreboard_if scoreboard_if);
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// variable declarations
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Scoreboard sb = new;
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semaphore wb_lock = new(1);
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@(scoreboard_if.mck);
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// if we are not full load another instruction
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if (scoreboard_if.full == 1'b0) begin
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temp_scoreboard_entry = randomize_scoreboard();
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scoreboard_queue.push_back(temp_scoreboard_entry);
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scoreboard_if.mck.decoded_instr <= temp_scoreboard_entry;
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scoreboard_if.mck.decoded_instr_valid <= 1'b1;
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end else begin
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scoreboard_if.mck.decoded_instr_valid <= 1'b0;
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end
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assign scoreboard_if.flush = 1'b0;
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initial begin
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// register the scoreboard interface
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// uvm_config_db #(virtual scoreboard_if)::set(null, "uvm_test_top", "scoreboard_vif", scoreboard_if);
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end
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end
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scoreboard_entry issue_instruction;
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// pull e.g. issue instructions
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initial begin
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wait(rst_ni == 1'b1);
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forever begin
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@(scoreboard_if.mck);
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// push new decoded instructions
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initial begin
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scoreboard_if.mck.decoded_instr_valid <= 1'b0;
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wait(rst_ni == 1'b1);
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// load the scoreboard until it is full
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forever begin
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// if we are not full then load another instruction
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if (scoreboard_if.issue_instr_valid == 1'b1) begin
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scoreboard_if.mck.issue_ack <= 1'b1;
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issue_instruction <= scoreboard_if.mck.issue_instr;
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$display("Time: %t, Issuing: %0h, Valid: %h", $time, scoreboard_if.mck.issue_instr.pc, scoreboard_if.issue_instr_valid);
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@(scoreboard_if.mck)
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scoreboard_if.mck.issue_ack <= 1'b0;
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// generate a delay between 0 and 3 cycles for WB, write-back out of order
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fork
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write_back: begin
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automatic scoreboard_entry thread_copy = issue_instruction;
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repeat ($urandom_range(0,20)) @(scoreboard_if.mck);
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wb_lock.get(1);
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$display("Time: %t, Writing Back: %0h", $time, thread_copy.pc);
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scoreboard_if.mck.pc <= thread_copy.pc;
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scoreboard_if.mck.wdata <= 64'h7777;
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scoreboard_if.mck.wb_valid <= 1'b1;
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@(scoreboard_if.mck);
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scoreboard_if.mck.wb_valid <= 1'b0;
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wb_lock.put(1);
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end
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join_none
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end else begin
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scoreboard_if.mck.issue_ack <= 1'b0;
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end
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end
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end
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// commit instructions
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initial begin
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wait(rst_ni == 1'b1);
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forever begin
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repeat ($urandom_range(1,3)) @(scoreboard_if.mck);
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if (scoreboard_if.mck.commit_instr.valid == 1'b1) begin
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$display("Time: %t, Commiting: %0h", $time, scoreboard_if.mck.commit_instr.pc);
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scoreboard_if.mck.commit_ack <= 1'b1;
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@(scoreboard_if.mck);
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scoreboard_if.mck.commit_ack <= 1'b0;
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repeat ($urandom_range(0,3)) @(scoreboard_if.mck);
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end else
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scoreboard_if.mck.commit_ack <= 1'b0;
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end
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end
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// commit checker e.g.: monitor
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initial begin
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wait(rst_ni == 1'b1);
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// if we are not full load another instruction
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if (scoreboard_if.full == 1'b0) begin
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scoreboard_if.mck.decoded_instr <= Scoreboard::randomize_scoreboard();
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scoreboard_if.mck.decoded_instr_valid <= 1'b1;
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end else begin
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scoreboard_if.mck.decoded_instr_valid <= 1'b0;
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end
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forever begin
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@(scoreboard_if.pck);
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if (scoreboard_if.pck.commit_ack == 1'b1) begin
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comp = scoreboard_queue.pop_front();
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assert (comp.pc === scoreboard_if.pck.commit_instr.pc) else $error($sformatf("Mismatch: Expected: %0h Got: %0h", comp.pc, scoreboard_if.pck.commit_instr.pc));
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end
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end
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end
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scoreboard_entry issue_instruction;
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// pull e.g. issue instructions
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initial begin
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wait(rst_ni == 1'b1);
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forever begin
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@(scoreboard_if.mck);
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// if we are not full then load another instruction
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if (scoreboard_if.issue_instr_valid == 1'b1) begin
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scoreboard_if.mck.issue_ack <= 1'b1;
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issue_instruction <= scoreboard_if.mck.issue_instr;
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// $display("Time: %t, Issuing: %0h, Valid: %h", $time, scoreboard_if.mck.issue_instr.pc, scoreboard_if.issue_instr_valid);
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@(scoreboard_if.mck)
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scoreboard_if.mck.issue_ack <= 1'b0;
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// generate a delay between 0 and 3 cycles for WB, write-back out of order
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fork
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write_back: begin
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automatic scoreboard_entry thread_copy = issue_instruction;
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automatic logic [63:0] rand_data = $urandom_range(0, 2**31);
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repeat ($urandom_range(1,20)) @(scoreboard_if.mck);
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wb_lock.get(1);
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// $display("Time: %t, Writing Back: %0h", $time, thread_copy.pc);
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scoreboard_if.mck.pc <= thread_copy.pc;
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scoreboard_if.mck.wdata <= rand_data;
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scoreboard_if.mck.wb_valid <= 1'b1;
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sb.write_back(thread_copy.pc, rand_data);
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@(scoreboard_if.mck);
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scoreboard_if.mck.wb_valid <= 1'b0;
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wb_lock.put(1);
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end
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join_none
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end else begin
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scoreboard_if.mck.issue_ack <= 1'b0;
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end
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end
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end
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// commit instructions
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initial begin
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wait(rst_ni == 1'b1);
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forever begin
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repeat ($urandom_range(1,3)) @(scoreboard_if.mck);
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if (scoreboard_if.mck.commit_instr.valid == 1'b1) begin
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// $display("Time: %t, Commiting: %0h", $time, scoreboard_if.mck.commit_instr.pc);
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scoreboard_if.mck.commit_ack <= 1'b1;
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@(scoreboard_if.mck);
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scoreboard_if.mck.commit_ack <= 1'b0;
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repeat ($urandom_range(0,3)) @(scoreboard_if.mck);
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end else
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scoreboard_if.mck.commit_ack <= 1'b0;
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end
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end
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// ------------------
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// Monitor + Checker
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// ------------------
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initial begin
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wait(rst_ni == 1'b1);
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forever begin
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@(scoreboard_if.pck);
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if (scoreboard_if.pck.decoded_instr_valid == 1'b1) begin
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sb.submit_instruction(scoreboard_if.pck.decoded_instr);
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end
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end
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end
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scoreboard_entry tmp_sbe;
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initial begin
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wait(rst_ni == 1'b1);
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forever begin
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@(scoreboard_if.pck);
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if (scoreboard_if.pck.issue_instr_valid == 1'b1 && scoreboard_if.pck.issue_ack) begin
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tmp_sbe = sb.get_issue();
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assert (tmp_sbe.pc == issue_instruction.pc) else $error("Issue instruction mismatch. Expected: %0h Got: %0h", tmp_sbe, issue_instruction);
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end
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end
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end
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// commit checker
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scoreboard_entry comp;
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initial begin
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wait(rst_ni == 1'b1);
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forever begin
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@(scoreboard_if.pck);
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if (scoreboard_if.pck.commit_ack == 1'b1) begin
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comp = sb.commit();
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assert (comp === scoreboard_if.pck.commit_instr) else $error($sformatf("Mismatch: Expected: %0h Got: %0h", comp, scoreboard_if.pck.commit_instr));
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end
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end
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end
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endprogram
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testbench tb(scoreboard_if);
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endmodule
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