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docs: update URL in CSR access DV plan (fix #2625) (#2627)
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CSR are no more described in CV32A6_Control_Status_Registers.html
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André Sintzoff 2024-11-22 15:12:57 +01:00 • committed by GitHub
parent 7eb33df0ac
commit f800707738
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GPG key ID: B5690EEEBB952194
6 changed files with 30 additions and 30 deletions
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6
verif/docs/VerifPlans/csr_access/VP_IP000.yml
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@ -17,7 +17,7 @@ subfeatures: !!omap
description: Upon reset, RISC-V CVA6 Machine mode RW CSRs must initialize
to their respective POR value.
reqt_doc:
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CV32A6_Control_Status_Registers.html
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CSR_CV32A60X.html
ref_mode: page
ref_page: ''
ref_section: ''
@ -68,7 +68,7 @@ subfeatures: !!omap
random values like 0xa5a5a5a5, 0x5a5a5a5a, 0xffa1ae40.. and read using the
CSR instructions defined in the instruction set architecture (ISA).
reqt_doc:
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CV32A6_Control_Status_Registers.html
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CSR_CV32A60X.html
ref_mode: page
ref_page: ''
ref_section: ''
@ -94,7 +94,7 @@ subfeatures: !!omap
description: Accessing RISC-V CVA6 Machine Mode CSRs in different privilege
modes (User, Supervisor and Machine modes).
reqt_doc:
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CV32A6_Control_Status_Registers.html
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CSR_CV32A60X.html
ref_mode: page
ref_page: ''
ref_section: ''

6
verif/docs/VerifPlans/csr_access/VP_IP001.yml
View file

@ -16,7 +16,7 @@ subfeatures: !!omap
description: Upon reset,RISC-V CVA6 Machine RO(read only) CSR must initialize
to their respective POR value.
reqt_doc:
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CV32A6_Control_Status_Registers.html
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CSR_CV32A60X.html
ref_mode: page
ref_page: ''
ref_section: ''
@ -42,7 +42,7 @@ subfeatures: !!omap
random values like 0xa5a5a5a5, 0x5a5a5a5a, 0xffa1ae40.. and confirm whether
write into RO CSRs is possible or not.
reqt_doc:
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CV32A6_Control_Status_Registers.html
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CSR_CV32A60X.html
ref_mode: page
ref_page: ''
ref_section: ''
@ -68,7 +68,7 @@ subfeatures: !!omap
description: Accessing RISC-V Machine read only CSRs in different privilege
modes (User, Supervisor and Machine modes).
reqt_doc:
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CV32A6_Control_Status_Registers.html
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CSR_CV32A60X.html
ref_mode: page
ref_page: ''
ref_section: ''

6
verif/docs/VerifPlans/csr_access/VP_IP002.yml
View file

@ -17,7 +17,7 @@ subfeatures: !!omap
description: Upon reset, RISC-V CVA6 Supervisor mode RW CSRs must initialize
to their respective POR value.
reqt_doc:
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CV32A6_Control_Status_Registers.html
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CSR_CV32A60X.html
ref_mode: page
ref_page: ''
ref_section: ''
@ -67,7 +67,7 @@ subfeatures: !!omap
writing random values like 0xa5a5a5a5, 0x5a5a5a5a, 0xffa1ae40.. and read
using the CSR instructions defined in the instruction set architecture (ISA).
reqt_doc:
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CV32A6_Control_Status_Registers.html
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CSR_CV32A60X.html
ref_mode: page
ref_page: ''
ref_section: ''
@ -93,7 +93,7 @@ subfeatures: !!omap
description: Accessing RISC-V CVA6 Supervisor Mode CSRs in different privilege
modes (User,Supervisor and Machine modes).
reqt_doc:
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CV32A6_Control_Status_Registers.html
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CSR_CV32A60X.html
ref_mode: page
ref_page: ''
ref_section: ''

6
verif/docs/VerifPlans/csr_access/VP_IP003.yml
View file

@ -16,7 +16,7 @@ subfeatures: !!omap
description: Upon reset, RISC-V CVA6 User mode counter CSRs must initialize
to their respective POR value.
reqt_doc:
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CV32A6_Control_Status_Registers.html
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CSR_CV32A60X.html
ref_mode: page
ref_page: ''
ref_section: ''
@ -51,7 +51,7 @@ subfeatures: !!omap
two continuous reads and checking whether the value in the second read is
greater than the value in the first read."
reqt_doc:
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CV32A6_Control_Status_Registers.html
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CSR_CV32A60X.html
ref_mode: page
ref_page: ''
ref_section: ''
@ -80,7 +80,7 @@ subfeatures: !!omap
description: Accessing RISC-V CVA6 user Mode counter CSR in different privilege
modes (User, Supervisor and Machine modes).
reqt_doc:
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CV32A6_Control_Status_Registers.html
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CSR_CV32A60X.html
ref_mode: page
ref_page: ''
ref_section: ''

6
verif/docs/VerifPlans/csr_access/VP_IP004.yml
View file

@ -16,7 +16,7 @@ subfeatures: !!omap
description: Upon reset, RISC-V CVA6 Machine mode counter CSRs must initialize
to their respective POR value.
reqt_doc:
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CV32A6_Control_Status_Registers.html
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CSR_CV32A60X.html
ref_mode: page
ref_page: ''
ref_section: ''
@ -52,7 +52,7 @@ subfeatures: !!omap
tested by performing two continuous reads and checking whether the value
in the second read is greater than the value in the first read."
reqt_doc:
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CV32A6_Control_Status_Registers.html
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CSR_CV32A60X.html
ref_mode: page
ref_page: ''
ref_section: ''
@ -81,7 +81,7 @@ subfeatures: !!omap
description: Accessing RISC-V CVA6 user Machine mode counter CSRs in different
privilege modes (User, Supervisor and Machine modes).
reqt_doc:
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CV32A6_Control_Status_Registers.html
https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CSR_CV32A60X.html
ref_mode: page
ref_page: ''
ref_section: ''

30
verif/docs/VerifPlans/csr_access/dvplan_csr-access.md
View file

@ -89,7 +89,7 @@ Module: CSR ACCESS VERIFICATION[](#module-csr-access-verification "Permalink
##### Item: 000[](#item-000 "Permalink to this headline")
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CV32A6\_Control\_Status\_Registers.html
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CSR\_CV32A60X.html
* **Feature Description**
@ -153,7 +153,7 @@ Module: CSR ACCESS VERIFICATION[](#module-csr-access-verification "Permalink
##### Item: 000[](#id2 "Permalink to this headline")
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CV32A6\_Control\_Status\_Registers.html
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CSR\_CV32A60X.html
* **Feature Description**
@ -188,7 +188,7 @@ Module: CSR ACCESS VERIFICATION[](#module-csr-access-verification "Permalink
##### Item: 000[](#id3 "Permalink to this headline")
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CV32A6\_Control\_Status\_Registers.html
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CSR\_CV32A60X.html
* **Feature Description**
@ -223,7 +223,7 @@ Module: CSR ACCESS VERIFICATION[](#module-csr-access-verification "Permalink
##### Item: 000[](#id5 "Permalink to this headline")
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CV32A6\_Control\_Status\_Registers.html
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CSR\_CV32A60X.html
* **Feature Description**
@ -254,7 +254,7 @@ Module: CSR ACCESS VERIFICATION[](#module-csr-access-verification "Permalink
##### Item: 000[](#id6 "Permalink to this headline")
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CV32A6\_Control\_Status\_Registers.html
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CSR\_CV32A60X.html
* **Feature Description**
@ -287,7 +287,7 @@ Module: CSR ACCESS VERIFICATION[](#module-csr-access-verification "Permalink
##### Item: 000[](#id7 "Permalink to this headline")
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CV32A6\_Control\_Status\_Registers.html
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CSR\_CV32A60X.html
* **Feature Description**
@ -322,7 +322,7 @@ Module: CSR ACCESS VERIFICATION[](#module-csr-access-verification "Permalink
##### Item: 000[](#id9 "Permalink to this headline")
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CV32A6\_Control\_Status\_Registers.html
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CSR\_CV32A60X.html
* **Feature Description**
@ -384,7 +384,7 @@ Module: CSR ACCESS VERIFICATION[](#module-csr-access-verification "Permalink
##### Item: 000[](#id13 "Permalink to this headline")
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CV32A6\_Control\_Status\_Registers.html
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CSR\_CV32A60X.html
* **Feature Description**
@ -417,7 +417,7 @@ Module: CSR ACCESS VERIFICATION[](#module-csr-access-verification "Permalink
##### Item: 000[](#id15 "Permalink to this headline")
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CV32A6\_Control\_Status\_Registers.html
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CSR\_CV32A60X.html
* **Feature Description**
@ -451,7 +451,7 @@ Module: CSR ACCESS VERIFICATION[](#module-csr-access-verification "Permalink
##### Item: 000[](#id17 "Permalink to this headline")
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CV32A6\_Control\_Status\_Registers.html
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CSR\_CV32A60X.html
* **Feature Description**
@ -483,7 +483,7 @@ Module: CSR ACCESS VERIFICATION[](#module-csr-access-verification "Permalink
##### Item: 000[](#id18 "Permalink to this headline")
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CV32A6\_Control\_Status\_Registers.html
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CSR\_CV32A60X.html
* **Feature Description**
@ -524,7 +524,7 @@ Module: CSR ACCESS VERIFICATION[](#module-csr-access-verification "Permalink
##### Item: 000[](#id20 "Permalink to this headline")
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CV32A6\_Control\_Status\_Registers.html
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CSR\_CV32A60X.html
* **Feature Description**
@ -588,7 +588,7 @@ Module: CSR ACCESS VERIFICATION[](#module-csr-access-verification "Permalink
##### Item: 000[](#id23 "Permalink to this headline")
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CV32A6\_Control\_Status\_Registers.html
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CSR\_CV32A60X.html
* **Feature Description**
@ -620,7 +620,7 @@ Module: CSR ACCESS VERIFICATION[](#module-csr-access-verification "Permalink
##### Item: 000[](#id25 "Permalink to this headline")
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CV32A6\_Control\_Status\_Registers.html
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CSR\_CV32A60X.html
* **Feature Description**
@ -662,7 +662,7 @@ Module: CSR ACCESS VERIFICATION[](#module-csr-access-verification "Permalink
##### Item: 000[](#id27 "Permalink to this headline")
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CV32A6\_Control\_Status\_Registers.html
* **Requirement location:** https://docs.openhwgroup.org/projects/cva6-user-manual/01\_cva6\_user/CSR\_CV32A60X.html
* **Feature Description**