Add dump device to Spike

tb/riscv-isa-sim/riscv/devices.h

@@ -6,6 +6,7 @@
 #include <string>
 #include <map>
 #include <vector>
+#include <fstream>
 
 class processor_t;
 
@@ -94,4 +95,13 @@ class uart_t : public abstract_device_t {
   bool fifo_enabled;
 };
 
+class dump_t : public abstract_device_t {
+ public:
+  dump_t();
+  bool load(reg_t addr, size_t len, uint8_t* bytes);
+  bool store(reg_t addr, size_t len, const uint8_t* bytes);
+ private:
+  std::ofstream ofs;
+};
+
 #endif

tb/riscv-isa-sim/riscv/encoding.h

@@ -157,6 +157,8 @@
 #define UART_SIZE          0x00010000
 #define EXT_IO_BASE        0x40000000
 #define DRAM_BASE          0x80000000
+#define DUMP_BASE          0x82000000
+#define DUMP_SIZE          0x20000000
 
 // page table entry (PTE) fields
 #define PTE_V     0x001 // Valid

tb/riscv-isa-sim/riscv/riscv.mk.in

@@ -51,6 +51,7 @@ riscv_srcs = \
 	rom.cc \
     clint.cc \
 	uart.cc \
+	dump.cc \
 	debug_module.cc \
 	remote_bitbang.cc \
 	jtag_dtm.cc \

tb/riscv-isa-sim/riscv/sim.cc

@@ -60,8 +60,12 @@ sim_t::sim_t(const char* isa, size_t nprocs, bool halted, reg_t start_pc,
 
   clint.reset(new clint_t(procs));
   bus.add_device(CLINT_BASE, clint.get());
+
   uart.reset(new uart_t());
   bus.add_device(UART_BASE, uart.get());
+
+  dump.reset(new dump_t());
+  bus.add_device(DUMP_BASE, dump.get());
 }
 
 sim_t::~sim_t()

tb/riscv-isa-sim/riscv/sim.h

@@ -53,6 +53,7 @@ private:
   std::string dts;
   std::unique_ptr<rom_device_t> boot_rom;
   std::unique_ptr<clint_t> clint;
+  std::unique_ptr<dump_t> dump;
   std::unique_ptr<uart_t> uart;
   bus_t bus;