github-mirrors/cva6
1
0
Fork 0
mirror of https://github.com/openhwgroup/cva6.git synced 2025-04-19 11:54:46 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

Fix off by one error in PMP length (#2394)

Browse source
This commit is contained in:
Moritz Schneider 2024-07-25 12:08:53 +02:00 • committed by GitHub
parent 631513eda8
commit fd489a16fb
No known key found for this signature in database
GPG key ID: B5690EEEBB952194
8 changed files with 17 additions and 17 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
.gitlab-ci/expected_synth.yml
View file

@ -1,2 +1,2 @@
cv32a65x:
gates: 172629
gates: 171002

4
core/acc_dispatcher.sv
View file

@ -65,8 +65,8 @@ module acc_dispatcher
// Interface with the CSRs
input priv_lvl_t ld_st_priv_lvl_i,
input logic sum_i,
input pmpcfg_t [CVA6Cfg.NrPMPEntries:0] pmpcfg_i,
input logic [CVA6Cfg.NrPMPEntries:0][CVA6Cfg.PLEN-3:0] pmpaddr_i,
input pmpcfg_t [CVA6Cfg.NrPMPEntries-1:0] pmpcfg_i,
input logic [CVA6Cfg.NrPMPEntries-1:0][CVA6Cfg.PLEN-3:0] pmpaddr_i,
input logic [2:0] fcsr_frm_i,
output logic dirty_v_state_o,
// Interface with the issue stage

8
core/csr_regfile.sv
View file

@ -163,9 +163,9 @@ module csr_regfile
// TO_BE_COMPLETED - PERF_COUNTERS
output logic perf_we_o,
// PMP configuration containing pmpcfg for max 64 PMPs - ACC_DISPATCHER
output riscv::pmpcfg_t [CVA6Cfg.NrPMPEntries:0] pmpcfg_o,
output riscv::pmpcfg_t [CVA6Cfg.NrPMPEntries-1:0] pmpcfg_o,
// PMP addresses - ACC_DISPATCHER
output logic [CVA6Cfg.NrPMPEntries:0][CVA6Cfg.PLEN-3:0] pmpaddr_o,
output logic [CVA6Cfg.NrPMPEntries-1:0][CVA6Cfg.PLEN-3:0] pmpaddr_o,
// TO_BE_COMPLETED - PERF_COUNTERS
output logic [31:0] mcountinhibit_o,
// RVFI
@ -293,8 +293,8 @@ module csr_regfile
| (CVA6Cfg.XLEN'(CVA6Cfg.NSX) << 23) // X - Non-standard extensions present
| ((CVA6Cfg.XLEN == 64 ? 2 : 1) << CVA6Cfg.XLEN - 2); // MXL
assign pmpcfg_o = pmpcfg_q[CVA6Cfg.NrPMPEntries:0];
assign pmpaddr_o = pmpaddr_q[CVA6Cfg.NrPMPEntries:0];
assign pmpcfg_o = pmpcfg_q[CVA6Cfg.NrPMPEntries-1:0];
assign pmpaddr_o = pmpaddr_q[CVA6Cfg.NrPMPEntries-1:0];
riscv::fcsr_t fcsr_q, fcsr_d;
// ----------------

4
core/cva6.sv
View file

@ -554,8 +554,8 @@ module cva6
logic acc_cons_en_csr;
logic debug_mode;
logic single_step_csr_commit;
riscv::pmpcfg_t [CVA6Cfg.NrPMPEntries:0] pmpcfg;
logic [CVA6Cfg.NrPMPEntries:0][CVA6Cfg.PLEN-3:0] pmpaddr;
riscv::pmpcfg_t [CVA6Cfg.NrPMPEntries-1:0] pmpcfg;
logic [CVA6Cfg.NrPMPEntries-1:0][CVA6Cfg.PLEN-3:0] pmpaddr;
logic [31:0] mcountinhibit_csr_perf;
// ----------------------------
// Performance Counters <-> *

4
core/cva6_mmu/cva6_mmu.sv
View file

@ -99,8 +99,8 @@ module cva6_mmu
output dcache_req_i_t req_port_o,
// PMP
input riscv::pmpcfg_t [CVA6Cfg.NrPMPEntries:0] pmpcfg_i,
input logic [CVA6Cfg.NrPMPEntries:0][CVA6Cfg.PLEN-3:0] pmpaddr_i
input riscv::pmpcfg_t [CVA6Cfg.NrPMPEntries-1:0] pmpcfg_i,
input logic [CVA6Cfg.NrPMPEntries-1:0][CVA6Cfg.PLEN-3:0] pmpaddr_i
);
// memory management, pte for cva6

4
core/cva6_mmu/cva6_ptw.sv
View file

@ -84,8 +84,8 @@ module cva6_ptw
// PMP
input riscv::pmpcfg_t [CVA6Cfg.NrPMPEntries:0] pmpcfg_i,
input logic [CVA6Cfg.NrPMPEntries:0][CVA6Cfg.PLEN-3:0] pmpaddr_i,
input riscv::pmpcfg_t [CVA6Cfg.NrPMPEntries-1:0] pmpcfg_i,
input logic [CVA6Cfg.NrPMPEntries-1:0][CVA6Cfg.PLEN-3:0] pmpaddr_i,
output logic [CVA6Cfg.PLEN-1:0] bad_paddr_o,
output logic [CVA6Cfg.GPLEN-1:0] bad_gpaddr_o

4
core/ex_stage.sv
View file

@ -222,9 +222,9 @@ module ex_stage
// To count the data TLB misses - PERF_COUNTERS
output logic dtlb_miss_o,
// Report the PMP configuration - CSR_REGFILE
input riscv::pmpcfg_t [CVA6Cfg.NrPMPEntries:0] pmpcfg_i,
input riscv::pmpcfg_t [CVA6Cfg.NrPMPEntries-1:0] pmpcfg_i,
// Report the PMP addresses - CSR_REGFILE
input logic [CVA6Cfg.NrPMPEntries:0][CVA6Cfg.PLEN-3:0] pmpaddr_i,
input logic [CVA6Cfg.NrPMPEntries-1:0][CVA6Cfg.PLEN-3:0] pmpaddr_i,
// Information dedicated to RVFI - RVFI
output lsu_ctrl_t rvfi_lsu_ctrl_o,
// Information dedicated to RVFI - RVFI

4
core/load_store_unit.sv
View file

@ -148,9 +148,9 @@ module load_store_unit
input amo_resp_t amo_resp_i,
// PMP configuration - CSR_REGFILE
input riscv::pmpcfg_t [CVA6Cfg.NrPMPEntries:0] pmpcfg_i,
input riscv::pmpcfg_t [CVA6Cfg.NrPMPEntries-1:0] pmpcfg_i,
// PMP address - CSR_REGFILE
input logic [CVA6Cfg.NrPMPEntries:0][CVA6Cfg.PLEN-3:0] pmpaddr_i,
input logic [CVA6Cfg.NrPMPEntries-1:0][CVA6Cfg.PLEN-3:0] pmpaddr_i,
// RVFI inforamtion - RVFI
output lsu_ctrl_t rvfi_lsu_ctrl_o,