cva6/fpga/ariane_pmod.cfg

30 lines
738 B
INI

adapter_khz 1000
interface ftdi
# ftdi_device_desc "Olimex Ltd. ARM-USB-OCD-H JTAG+RS232"
ftdi_vid_pid 0x15ba 0x002b
ftdi_layout_init 0x0808 0x0a1b
ftdi_layout_signal nSRST -oe 0x0200
ftdi_layout_signal nTRST -data 0x0100 -oe 0x0100
ftdi_layout_signal LED -data 0x0800
set _CHIPNAME riscv
jtag newtap $_CHIPNAME cpu -irlen 5
set _TARGETNAME $_CHIPNAME.cpu
# select the HART to debug with the coreid switch
target create $_TARGETNAME riscv -chain-position $_TARGETNAME -coreid 0
gdb_report_data_abort enable
gdb_report_register_access_error enable
riscv set_reset_timeout_sec 120
riscv set_command_timeout_sec 120
# prefer to use sba for system bus access
riscv set_prefer_sba off
init
halt
echo "Ready for Remote Connections"