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https://github.com/openhwgroup/cva6.git
synced 2025-04-22 05:07:21 -04:00
* Add spike isa sim * Fix AMO problem in verilator * 🎨 Tidy up FPU wrapper * Bump axi_exclusive submodule * Refactor serpent AXI adapter, bump dbg and atomics submodules, add separate bootrom for linux on OpenPiton (#190) * Refactor serpent AXI adapter * Disable FPU in OpenPiton by default * Bump dbg and atomics submodules * Fix cache testbenches (interface change) * FPGA bootrom changes for OpenPiton SDHC * Introduce two bootroms, one for baremetal apps (pitonstream), and one for linux boot from SD * Testing barrier-based synchronisation instead of CLINT-based * This bootrom works for 2 core on g2 and if you change MAX_HARTS to 4, then 4 cores on vc707 * Add MAX_HARTS switch to makefile * Fix gitlab CI * Revert standard FPGA bootrom * Update Flist * Make UART_FREQ a parameter * Fix typo in tb.list and an error in define switch in ariane_pkg * Copy over SD-driver in bootloader from @leon575777642 * Fix compilation issues of bootrom * Change signal name in serpent periph portlist * Correct generate statement in serpent dcache memory * Add Piton SD Controller, FPGA fixes * Fix race condition in dcache misshandler * Add tandem spike to Make flow * Remove OpenPiton SD Card controller again
133 lines
No EOL
4.1 KiB
C++
133 lines
No EOL
4.1 KiB
C++
#include <fesvr/elf.h>
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#include <fesvr/memif.h>
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#include "sim_spike.h"
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#include "msim_helper.h"
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#include <vpi_user.h>
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#include "svdpi.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <vector>
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#include <string>
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#include <memory>
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#include <sys/mman.h>
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#include <sys/stat.h>
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#include <fcntl.h>
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#include <assert.h>
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#include <unistd.h>
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#include <map>
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#include <iostream>
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sim_spike_t* sim;
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std::vector<std::pair<reg_t, mem_t*>> mem;
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commit_log_t commit_log_val;
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#define SHT_PROGBITS 0x1
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#define SHT_GROUP 0x11
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void write_spike_mem (reg_t address, size_t len, uint8_t* buf) {
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memcpy(mem[0].second->contents() + (address & ~(1 << 31)), buf,len);
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}
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void read_elf(const char* filename) {
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int fd = open(filename, O_RDONLY);
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struct stat s;
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assert(fd != -1);
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if (fstat(fd, &s) < 0)
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abort();
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size_t size = s.st_size;
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char* buf = (char*)mmap(NULL, size, PROT_READ, MAP_PRIVATE, fd, 0);
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assert(buf != MAP_FAILED);
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close(fd);
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assert(size >= sizeof(Elf64_Ehdr));
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const Elf64_Ehdr* eh64 = (const Elf64_Ehdr*)buf;
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assert(IS_ELF32(*eh64) || IS_ELF64(*eh64));
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std::vector<uint8_t> zeros;
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#define LOAD_ELF(ehdr_t, phdr_t, shdr_t, sym_t) do { \
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ehdr_t* eh = (ehdr_t*)buf; \
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phdr_t* ph = (phdr_t*)(buf + eh->e_phoff); \
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assert(size >= eh->e_phoff + eh->e_phnum*sizeof(*ph)); \
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for (unsigned i = 0; i < eh->e_phnum; i++) { \
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if(ph[i].p_type == PT_LOAD && ph[i].p_memsz) { \
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if (ph[i].p_filesz) { \
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assert(size >= ph[i].p_offset + ph[i].p_filesz); \
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write_spike_mem(ph[i].p_paddr, ph[i].p_filesz, (uint8_t*)buf + ph[i].p_offset); \
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} \
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zeros.resize(ph[i].p_memsz - ph[i].p_filesz); \
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} \
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} \
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shdr_t* sh = (shdr_t*)(buf + eh->e_shoff); \
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assert(size >= eh->e_shoff + eh->e_shnum*sizeof(*sh)); \
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assert(eh->e_shstrndx < eh->e_shnum); \
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assert(size >= sh[eh->e_shstrndx].sh_offset + sh[eh->e_shstrndx].sh_size); \
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char *shstrtab = buf + sh[eh->e_shstrndx].sh_offset; \
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unsigned strtabidx = 0, symtabidx = 0; \
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for (unsigned i = 0; i < eh->e_shnum; i++) { \
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unsigned max_len = sh[eh->e_shstrndx].sh_size - sh[i].sh_name; \
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if ((sh[i].sh_type & SHT_GROUP) && strcmp(shstrtab + sh[i].sh_name, ".strtab") != 0 && strcmp(shstrtab + sh[i].sh_name, ".shstrtab") != 0) \
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assert(strnlen(shstrtab + sh[i].sh_name, max_len) < max_len); \
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if (sh[i].sh_type & SHT_PROGBITS) continue; \
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if (strcmp(shstrtab + sh[i].sh_name, ".strtab") == 0) \
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strtabidx = i; \
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if (strcmp(shstrtab + sh[i].sh_name, ".symtab") == 0) \
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symtabidx = i; \
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} \
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if (strtabidx && symtabidx) { \
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char* strtab = buf + sh[strtabidx].sh_offset; \
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sym_t* sym = (sym_t*)(buf + sh[symtabidx].sh_offset); \
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for (unsigned i = 0; i < sh[symtabidx].sh_size/sizeof(sym_t); i++) { \
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unsigned max_len = sh[strtabidx].sh_size - sym[i].st_name; \
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assert(sym[i].st_name < sh[strtabidx]. sh_size); \
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assert(strnlen(strtab + sym[i].st_name, max_len) < max_len); \
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} \
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} \
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} while(0)
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if (IS_ELF32(*eh64))
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LOAD_ELF(Elf32_Ehdr, Elf32_Phdr, Elf32_Shdr, Elf32_Sym);
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else
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LOAD_ELF(Elf64_Ehdr, Elf64_Phdr, Elf64_Shdr, Elf64_Sym);
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munmap(buf, size);
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}
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extern "C" void spike_create(const char* filename, uint64_t dram_base, unsigned int size)
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{
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mem = std::vector<std::pair<reg_t, mem_t*>>(1, std::make_pair(reg_t(dram_base), new mem_t(size)));
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// zero out memory
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memset(mem[0].second->contents(), 0, size_t(size));
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read_elf(filename);
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if (!sim) {
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std::vector<std::string> htif_args = sanitize_args();
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sim = new sim_spike_t("rv64imac", 1, mem, htif_args);
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}
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}
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// advance Spike and get the retired instruction
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extern "C" void spike_tick(commit_log_t* commit_log)
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{
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commit_log_val = sim->tick(1);
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commit_log->priv = commit_log_val.priv;
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commit_log->pc = commit_log_val.pc;
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commit_log->is_fp = commit_log_val.is_fp;
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commit_log->rd = commit_log_val.rd;
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commit_log->data = commit_log_val.data;
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commit_log->instr = commit_log_val.instr;
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commit_log->was_exception = commit_log_val.was_exception;
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}
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extern "C" void clint_tick()
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{
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sim->clint_tick();
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} |