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* refactor gitlab ci & collect full fpga build artifacts * remove fpga log.tail from dashboard
51 lines
1.6 KiB
Python
51 lines
1.6 KiB
Python
# Copyright 2022 Thales Silicon Security
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#
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# Licensed under the Solderpad Hardware Licence, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.0
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# You may obtain a copy of the License at https://solderpad.org/licenses/
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#
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# Original Author: Guillaume Chauvon(guillaume.chauvon@thalesgroup.com)
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import re
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import sys
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import report_builder as rb
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with open(str(sys.argv[1]), "r") as f:
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log = f.read()
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pattern = re.compile(
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"\|(?P<ind> +)(?P<Instance>[\w()\[\].]+) +\| +(?P<Module>[\w()\[\].]+) \| +(?P<TotalLUTs>\d+) \| +(?P<LogicLUTs>\d+) \| +(?P<LUTRAMs>\d+) \| +(?P<SRLs>\d+) \| +(?P<FFs>\d+) \| +(?P<RAMB36>\d+) \| +(?P<RAMB18>\d+) \| +(?P<DSP48Blocks>\d+) \|"
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)
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data = []
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for line in pattern.finditer(log):
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l = line.groupdict()
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if l["Instance"] == "i_ariane_peripherals":
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break
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data.append(l)
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report = rb.Report()
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metric = rb.TableMetric('Utilization Results')
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for i in data:
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if (i["ind"]).count(" ") < 10:
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if i["Instance"] == "ariane_xilinx":
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total = int(i["TotalLUTs"]) // 1000
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report.label = f"{total} kLUTs"
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metric.add_value(
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i["Instance"],
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i["Module"],
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i["TotalLUTs"] + " TotalLUTs",
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i["LogicLUTs"] + " LogicLUTs",
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i["LUTRAMs"] + " LUTRAMs",
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i["SRLs"] + " SRLs",
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i["FFs"] + " FFs",
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i["RAMB36"] + " RAMB36",
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i["RAMB18"] + " RAMB18",
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i["DSP48Blocks"] + " DSP48Blocks",
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)
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report.add_metric(metric)
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report.dump()
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