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## Introduction This PR implements the ZCMT extension in the CVA6 core, targeting the 32-bit embedded-class platforms. ZCMT is a code-size reduction feature that utilizes compressed table jump instructions (cm.jt and cm.jalt) to reduce code size for embedded systems **Note:** Due to implementation complexity, ZCMT extension is primarily targeted at embedded class CPUs. Additionally, it is not compatible with architecture class profiles.(Ref. [Unprivilege spec 27.20](https://drive.google.com/file/d/1uviu1nH-tScFfgrovvFCrj7Omv8tFtkp/view)) ## Key additions - Added zcmt_decoder module for compressed table jump instructions: cm.jt (jump table) and cm.jalt (jump-and-link table) - Implemented the Jump Vector Table (JVT) CSR to store the base address of the jump table in csr_reg module - Implemented a return address stack, enabling cm.jalt to behave equivalently to jal ra (jump-and-link with return address), by pushing the return address onto the stack in zcmt_decoder module ## Implementation in CVA6 The implementation of the ZCMT extension involves the following major modifications: ### compressed decoder The compressed decoder scans and identifies the cm.jt and cm.jalt instructions, and generates signals indicating that the instruction is both compressed and a ZCMT instruction. ### zcmt_decoder A new zcmt_decoder module was introduced to decode the cm.jt and cm.jalt instructions, fetch the base address of the JVT table from JVT CSR, extract the index and construct jump instructions to ensure efficient integration of the ZCMT extension in embedded platforms. Table.1 shows the IO port connection of zcmt_decoder module. High-level block diagram of zcmt implementation in CVA6 is shown in Figure 1. _Table. 1 IO port connection with zcmt_decoder module_ Signals | IO | Description | Connection | Type -- | -- | -- | -- | -- clk_i | in | Subsystem Clock | SUBSYSTEM | logic rst_ni | in | Asynchronous reset active low | SUBSYSTEM | logic instr_i | in | Instruction in | compressed_decoder | logic [31:0] pc_i | in | Current PC | PC from FRONTEND | logic [CVA6Cfg.VLEN-1:0] is_zcmt_instr_i | in | Is instruction a zcmt instruction | compressed_decoder | logic illegal_instr_i | in | Is instruction a illegal instruction | compressed_decoder | logic is_compressed_i | in | Is instruction a compressed instruction | compressed_decoder | logic jvt_i | in | JVT struct from CSR | CSR | jvt_t req_port_i | in | Handshake between CACHE and FRONTEND (fetch) | Cache | dcache_req_o_t instr_o | out | Instruction out | cvxif_compressed_if_driver | logic [31:0] illegal_instr_o | out | Is the instruction is illegal | cvxif_compressed_if_driver | logic is_compressed_o | out | Is the instruction is compressed | cvxif_compressed_if_driver | logic fetch_stall_o | out | Stall siganl | cvxif_compressed_if_driver | logic req_port_o | out | Handshake between CACHE and FRONTEND (fetch) | Cache | dcache_req_i_t ### branch unit condition A condition is implemented in the branch unit to ensure that ZCMT instructions always cause a misprediction, forcing the program to jump to the calculated address of the newly constructed jump instruction. ### JVT CSR A new JVT csr is implemented in csr_reg which holds the base address of the JVT table. The base address is fetched from the JVT CSR, and combined with the index value to calculate the effective address. ### No MMU Embedded platform does not utilize the MMU, so zcmt_decoder is connected with cache through port 0 of the Dcache module for implicit read access from the memory.  _Figure. 1 High level block diagram of ZCMT extension implementation_ ## Known Limitations The implementation targets 32-bit instructions for embedded-class platforms without an MMU. Since the core does not utilize an MMU, it is leveraged to connect the zcmt_decoder to the cache via port 0. ## Testing and Verification - Developed directed test cases to validate cm.jt and cm.jalt instruction functionality - Verified correct initialization and updates of JVT CSR ### Test Plan A test plan is developed to test the functionality of ZCMT extension along with JVT CSR. Directed Assembly test executed to check the functionality. _Table. 2 Test plan_ S.no | Features | Description | Pass/Fail Criteria | Test Type | Test status -- | -- | -- | -- | ---- | -- 1 | cm.jt | Simple assembly test to validate the working of cm.jt instruction in CV32A60x. | Check against Spike's ref. model | Directed | Pass 2 | cm.jalt | Simple assembly test to validate the working of cm.jalt instruction in both CV32A60x. | Check against Spike's ref. model | Directed | Pass 3 | cm.jalt with return address stack | Simple assembly test to validate the working of cm.jalt instruction with return address stack in both CV32A60x. It works as jump and link ( j ra, imm) | Check against Spike's ref. model | Directed | Pass 4 | JVT CSR | Read and write base address of Jump table to JVT CSR | Check against Spike's ref. model | Directed | Pass **Note**: Please find the test under CVA6_REPO_DIR/verif/tests/custom/zcmt"
131 lines
5.2 KiB
Systemverilog
131 lines
5.2 KiB
Systemverilog
// Licensed under the Solderpad Hardware Licence, Version 2.1 (the "License");
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// you may not use this file except in compliance with the License.
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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// You may obtain a copy of the License at https://solderpad.org/licenses/
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//
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// Author: Farhan Ali Shah, 10xEngineers
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// Date: 15.11.2024
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// Description: ZCMT extension in the CVA6 core targeting the 32-bit embedded-class platforms (CV32A60x).
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// ZCMT is a code-size reduction feature that utilizes compressed table jump instructions (cm.jt and cm.jalt) to
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//reduce code size for embedded systems
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//
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module zcmt_decoder #(
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parameter config_pkg::cva6_cfg_t CVA6Cfg = config_pkg::cva6_cfg_empty,
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parameter type dcache_req_i_t = logic,
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parameter type dcache_req_o_t = logic,
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parameter type jvt_t = logic,
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parameter type branchpredict_sbe_t = logic
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) (
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// Subsystem Clock - SUBSYSTEM
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input logic clk_i,
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// Asynchronous reset active low - SUBSYSTEM
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input logic rst_ni,
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// Instruction input - compressed_decoder
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input logic [ 31:0] instr_i,
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// current PC - FRONTEND
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input logic [CVA6Cfg.VLEN-1:0] pc_i,
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// Intruction is of ZCMT extension - compressed_decoder
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input logic is_zcmt_instr_i,
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// Instruction is illegal - compressed_decoder
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input logic illegal_instr_i,
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// Instruction is compressed - compressed_decoder
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input logic is_compressed_i,
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// JVT struct input - CSR
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input jvt_t jvt_i,
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// Data cache request output - CACHE
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input dcache_req_o_t req_port_i,
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// Instruction out - cvxif_compressed_if_driver
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output logic [ 31:0] instr_o,
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// Instruction is illegal out - cvxif_compressed_if_driver
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output logic illegal_instr_o,
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// Instruction is compressed out - cvxif_compressed_if_driver
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output logic is_compressed_o,
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// Fetch stall - cvxif_compressed_if_driver
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output logic fetch_stall_o,
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// Data cache request input - CACHE
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output dcache_req_i_t req_port_o,
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// jump_address
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output logic [CVA6Cfg.XLEN-1:0] jump_address_o
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);
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// FSM States
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enum logic {
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IDLE, // if ZCMT instruction then request sent to fetch the entry from jump table
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TABLE_JUMP // Check the valid data from jump table and Calculate the offset for jump and create jal instruction
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}
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state_d, state_q;
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// Temporary registers
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// Physical address: jvt + (index <<2)
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logic [CVA6Cfg.VLEN-1:0] table_address;
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always_comb begin
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state_d = state_q;
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illegal_instr_o = 1'b0;
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is_compressed_o = is_zcmt_instr_i || is_compressed_i;
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fetch_stall_o = is_zcmt_instr_i;
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jump_address_o = '0;
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// cache request port
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req_port_o.data_wdata = '0;
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req_port_o.data_wuser = '0;
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req_port_o.data_req = 1'b0;
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req_port_o.data_we = 1'b0;
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req_port_o.data_be = '0;
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req_port_o.data_size = 2'b10;
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req_port_o.data_id = 1'b1;
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req_port_o.kill_req = 1'b0;
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req_port_o.tag_valid = 1'b1;
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unique case (state_q)
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IDLE: begin
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if (is_zcmt_instr_i) begin
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if (CVA6Cfg.XLEN == 32) begin //It is only target for 32 bit targets in cva6 with No MMU
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table_address = {jvt_i.base, 6'b000000} + {24'h0, instr_i[7:2], 2'b00};
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req_port_o.address_index = table_address[9:0];
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req_port_o.address_tag = table_address[CVA6Cfg.VLEN-1:10]; // No MMU support
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state_d = TABLE_JUMP;
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req_port_o.data_req = 1'b1;
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end else illegal_instr_o = 1'b1;
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// Condition may be extented for 64 bits embedded targets with No MMU
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end else begin
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illegal_instr_o = illegal_instr_i;
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instr_o = instr_i;
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state_d = IDLE;
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end
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end
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TABLE_JUMP: begin
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if (req_port_i.data_rvalid) begin
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// save the PC relative Xlen table jump address
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jump_address_o = $unsigned($signed(req_port_i.data_rdata) - $signed(pc_i));
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if (instr_i[9:2] < 32) begin // jal pc_offset, x0 for no return stack
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instr_o = {
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20'h0, 5'h0, riscv::OpcodeJal
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}; // immidiate assigned here (0) will be overwrite in decode stage with jump_address_o
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end else if ((instr_i[9:2] >= 32) & (instr_i[9:2] <= 255)) begin //- jal pc_offset, x1 for return stack
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instr_o = {
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20'h0, 5'h1, riscv::OpcodeJal
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}; // immidiate assigned here (0) will be overwrite in decode stage with jump_address_o
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end else begin
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illegal_instr_o = 1'b1;
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instr_o = instr_i;
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end
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state_d = IDLE;
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end else begin
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state_d = TABLE_JUMP;
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end
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end
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default: begin
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state_d = IDLE;
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end
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endcase
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end
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always_ff @(posedge clk_i or negedge rst_ni) begin
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if (~rst_ni) begin
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state_q <= IDLE;
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end else begin
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state_q <= state_d;
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end
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end
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endmodule
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