cva6/docs/07_cv32a60x/index.rst
André Sintzoff 5c3007db53
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docs: add CV32A60X configuration in RISC-V ISA manual (#2806)
* docs: spec_builder.py: add missing extensions
* docs: fix unpriv manual (opcode map, Zcmop)
- in opcode map, write not used when corresponding extension is disabled
- use correct condition for Zcmop extension
* docs: remove PMP chapter when no PMP
* docs: add tailored RISC-V ISA manual for CV32A60X configuration
2025-03-04 13:47:22 +01:00

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CV32A60X documentation
======================
.. toctree::
:maxdepth: 1
riscv/unpriv.rst
riscv/priv.rst