mirror of
https://github.com/openhwgroup/cva6.git
synced 2025-04-19 03:44:46 -04:00
41 lines
1 KiB
Bash
41 lines
1 KiB
Bash
##-----------------------------------------------------------------------------
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## Copyright 2024 Robert Bosch GmbH
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##
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## SPDX-License-Identifier: SHL-0.51
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##
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## Original Author: Konstantinos Leventos - Robert Bosch France SAS
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##-----------------------------------------------------------------------------
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# Where the tools are
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if ! [ -n "$RISCV" ]; then
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echo "Error: RISCV variable undefined"
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return
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fi
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# Install the required tools
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source ./verif/regress/install-spike.sh
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# Setup sim env
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source ./verif/sim/setup-env.sh
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if ! [ -n "$DV_SIMULATORS" ]; then
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DV_SIMULATORS=vcs-uvm
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fi
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if ! [ -n "$UVM_VERBOSITY" ]; then
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UVM_VERBOSITY=UVM_NONE
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fi
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export DV_OPTS="$DV_OPTS --issrun_opts=+debug_disable=1+UVM_VERBOSITY=$UVM_VERBOSITY"
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export DV_TARGET=cv32a65x
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make clean
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cd verif/sim/
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make clean_all
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python3 cva6.py --testlist=../tests/testlist_pmp-$DV_TARGET.yaml --target $DV_TARGET --iss_yaml=cva6.yaml --iss=$DV_SIMULATORS $DV_OPTS --linker=../../config/gen_from_riscv_config/cv32a60x/linker/link.ld
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make clean_all
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cd -
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make clean
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