Stefan 4b410a8835 dts: Fix FPGA timebase to 25MHz (#374) ... Fix rtc is actually running at 25MHz, causing a 30percent error for time related operations in linux		2020-02-04 15:20:33 +01:00
..
constraints	fpga: Add VC707 compatibility (#335)	2019-10-11 13:41:41 +02:00
scripts	fpga/run.tcl: Fix empty match rule	2020-01-22 16:06:43 +01:00
src	dts: Fix FPGA timebase to 25MHz (#374)	2020-02-04 15:20:33 +01:00
xilinx	fpga: Add VC707 compatibility (#335)	2019-10-11 13:41:41 +02:00
.gitignore	Put batch flow in place (incl small flow fixes)	2018-11-19 19:24:31 +01:00
ariane-multi-hart.cfg	openocd: Add multi-hart config	2019-06-04 10:36:17 +02:00
ariane.cfg	ariane.cfg: catch unavailable address translation option	2019-12-03 13:31:08 +01:00
ariane_pmod.cfg	Rerouting RISC-V DTM JTAG from PMOD header to 2nd channel of FTDI chip.	2019-01-30 11:36:34 +01:00
ariane_pmod_tiny.cfg	Rerouting RISC-V DTM JTAG from PMOD header to 2nd channel of FTDI chip.	2019-01-30 11:36:34 +01:00
Makefile	Adapt rgmii ethernet core from Alex Forencich for Ariane on Genesys2	2019-01-23 13:53:50 +00:00
sourceme.sh	fpga: Add VC707 compatibility (#335)	2019-10-11 13:41:41 +02:00