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* Create cva6_requirement_specification.rst Restarting from scratch after Eclipse check fail. Taken into account DBees review in PR #851. Removed no-reset FPGA design style (risky, very limited gain in nowadays FPGAs). * Add folder Add folder * Delete images * Create ignore.txt Workaround to create folder * Add files via upload CVA6 scope picture * Delete ignore.txt Remove file |
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.. | ||
_static | ||
specifications | ||
user_guide | ||
.gitignore | ||
commit_stage.rst | ||
conf.py | ||
cva6_soc.rst | ||
ex_stage.md | ||
id_stage.md | ||
if_stage.md | ||
index.rst | ||
intro.rst | ||
issue_stage.md | ||
make.bat | ||
Makefile | ||
pcgen_stage.md | ||
requirements.txt |