mirror of
https://github.com/openhwgroup/cva6.git
synced 2025-04-19 03:44:46 -04:00
162 lines
7.2 KiB
Systemverilog
162 lines
7.2 KiB
Systemverilog
package build_config_pkg;
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function automatic config_pkg::cva6_cfg_t build_config(config_pkg::cva6_user_cfg_t CVA6Cfg);
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bit IS_XLEN32 = (CVA6Cfg.XLEN == 32) ? 1'b1 : 1'b0;
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bit IS_XLEN64 = (CVA6Cfg.XLEN == 32) ? 1'b0 : 1'b1;
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bit FpPresent = CVA6Cfg.RVF | CVA6Cfg.RVD | CVA6Cfg.XF16 | CVA6Cfg.XF16ALT | CVA6Cfg.XF8;
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bit NSX = CVA6Cfg.XF16 | CVA6Cfg.XF16ALT | CVA6Cfg.XF8 | CVA6Cfg.XFVec; // Are non-standard extensions present?
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int unsigned FLen = CVA6Cfg.RVD ? 64 : // D ext.
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CVA6Cfg.RVF ? 32 : // F ext.
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CVA6Cfg.XF16 ? 16 : // Xf16 ext.
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CVA6Cfg.XF16ALT ? 16 : // Xf16alt ext.
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CVA6Cfg.XF8 ? 8 : // Xf8 ext.
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1; // Unused in case of no FP
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// Transprecision floating-point extensions configuration
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bit RVFVec = CVA6Cfg.RVF & CVA6Cfg.XFVec & FLen>32; // FP32 vectors available if vectors and larger fmt enabled
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bit XF16Vec = CVA6Cfg.XF16 & CVA6Cfg.XFVec & FLen>16; // FP16 vectors available if vectors and larger fmt enabled
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bit XF16ALTVec = CVA6Cfg.XF16ALT & CVA6Cfg.XFVec & FLen>16; // FP16ALT vectors available if vectors and larger fmt enabled
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bit XF8Vec = CVA6Cfg.XF8 & CVA6Cfg.XFVec & FLen>8; // FP8 vectors available if vectors and larger fmt enabled
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bit EnableAccelerator = CVA6Cfg.RVV; // Currently only used by V extension (Ara)
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int unsigned NrWbPorts = (CVA6Cfg.CvxifEn || EnableAccelerator) ? 5 : 4;
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int unsigned ICACHE_INDEX_WIDTH = $clog2(CVA6Cfg.IcacheByteSize / CVA6Cfg.IcacheSetAssoc);
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int unsigned DCACHE_INDEX_WIDTH = $clog2(CVA6Cfg.DcacheByteSize / CVA6Cfg.DcacheSetAssoc);
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int unsigned DCACHE_OFFSET_WIDTH = $clog2(CVA6Cfg.DcacheLineWidth / 8);
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// MMU
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int unsigned VpnLen = (CVA6Cfg.XLEN == 64) ? (CVA6Cfg.RVH ? 29 : 27) : 20;
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int unsigned PtLevels = (CVA6Cfg.XLEN == 64) ? 3 : 2;
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config_pkg::cva6_cfg_t cfg;
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cfg.XLEN = CVA6Cfg.XLEN;
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cfg.VLEN = (CVA6Cfg.XLEN == 32) ? 32 : 64;
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cfg.PLEN = (CVA6Cfg.XLEN == 32) ? 34 : 56;
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cfg.GPLEN = (CVA6Cfg.XLEN == 32) ? 34 : 41;
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cfg.IS_XLEN32 = IS_XLEN32;
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cfg.IS_XLEN64 = IS_XLEN64;
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cfg.XLEN_ALIGN_BYTES = $clog2(CVA6Cfg.XLEN / 8);
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cfg.ASID_WIDTH = (CVA6Cfg.XLEN == 64) ? 16 : 1;
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cfg.VMID_WIDTH = (CVA6Cfg.XLEN == 64) ? 14 : 1;
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cfg.FpgaEn = CVA6Cfg.FpgaEn;
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cfg.NrCommitPorts = CVA6Cfg.NrCommitPorts;
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cfg.NrLoadPipeRegs = CVA6Cfg.NrLoadPipeRegs;
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cfg.NrStorePipeRegs = CVA6Cfg.NrStorePipeRegs;
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cfg.AxiAddrWidth = CVA6Cfg.AxiAddrWidth;
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cfg.AxiDataWidth = CVA6Cfg.AxiDataWidth;
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cfg.AxiIdWidth = CVA6Cfg.AxiIdWidth;
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cfg.AxiUserWidth = CVA6Cfg.AxiUserWidth;
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cfg.MEM_TID_WIDTH = CVA6Cfg.MemTidWidth;
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cfg.NrLoadBufEntries = CVA6Cfg.NrLoadBufEntries;
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cfg.RVF = CVA6Cfg.RVF;
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cfg.RVD = CVA6Cfg.RVD;
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cfg.XF16 = CVA6Cfg.XF16;
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cfg.XF16ALT = CVA6Cfg.XF16ALT;
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cfg.XF8 = CVA6Cfg.XF8;
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cfg.RVA = CVA6Cfg.RVA;
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cfg.RVB = CVA6Cfg.RVB;
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cfg.RVV = CVA6Cfg.RVV;
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cfg.RVC = CVA6Cfg.RVC;
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cfg.RVH = CVA6Cfg.RVH;
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cfg.RVZCB = CVA6Cfg.RVZCB;
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cfg.RVZCMP = CVA6Cfg.RVZCMP;
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cfg.XFVec = CVA6Cfg.XFVec;
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cfg.CvxifEn = CVA6Cfg.CvxifEn;
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cfg.RVZiCond = CVA6Cfg.RVZiCond;
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cfg.NR_SB_ENTRIES = CVA6Cfg.NrScoreboardEntries;
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cfg.TRANS_ID_BITS = $clog2(CVA6Cfg.NrScoreboardEntries);
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cfg.FpPresent = bit'(FpPresent);
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cfg.NSX = bit'(NSX);
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cfg.FLen = unsigned'(FLen);
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cfg.RVFVec = bit'(RVFVec);
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cfg.XF16Vec = bit'(XF16Vec);
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cfg.XF16ALTVec = bit'(XF16ALTVec);
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cfg.XF8Vec = bit'(XF8Vec);
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cfg.NrRgprPorts = unsigned'(2);
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cfg.NrWbPorts = unsigned'(NrWbPorts);
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cfg.EnableAccelerator = bit'(EnableAccelerator);
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cfg.PerfCounterEn = CVA6Cfg.PerfCounterEn;
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cfg.MmuPresent = CVA6Cfg.MmuPresent;
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cfg.RVS = CVA6Cfg.RVS;
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cfg.RVU = CVA6Cfg.RVU;
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cfg.HaltAddress = CVA6Cfg.HaltAddress;
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cfg.ExceptionAddress = CVA6Cfg.ExceptionAddress;
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cfg.RASDepth = CVA6Cfg.RASDepth;
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cfg.BTBEntries = CVA6Cfg.BTBEntries;
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cfg.BHTEntries = CVA6Cfg.BHTEntries;
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cfg.DmBaseAddress = CVA6Cfg.DmBaseAddress;
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cfg.TvalEn = CVA6Cfg.TvalEn;
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cfg.NrPMPEntries = CVA6Cfg.NrPMPEntries;
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cfg.PMPCfgRstVal = CVA6Cfg.PMPCfgRstVal;
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cfg.PMPAddrRstVal = CVA6Cfg.PMPAddrRstVal;
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cfg.PMPEntryReadOnly = CVA6Cfg.PMPEntryReadOnly;
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cfg.NOCType = CVA6Cfg.NOCType;
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cfg.NrNonIdempotentRules = CVA6Cfg.NrNonIdempotentRules;
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cfg.NonIdempotentAddrBase = CVA6Cfg.NonIdempotentAddrBase;
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cfg.NonIdempotentLength = CVA6Cfg.NonIdempotentLength;
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cfg.NrExecuteRegionRules = CVA6Cfg.NrExecuteRegionRules;
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cfg.ExecuteRegionAddrBase = CVA6Cfg.ExecuteRegionAddrBase;
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cfg.ExecuteRegionLength = CVA6Cfg.ExecuteRegionLength;
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cfg.NrCachedRegionRules = CVA6Cfg.NrCachedRegionRules;
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cfg.CachedRegionAddrBase = CVA6Cfg.CachedRegionAddrBase;
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cfg.CachedRegionLength = CVA6Cfg.CachedRegionLength;
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cfg.MaxOutstandingStores = CVA6Cfg.MaxOutstandingStores;
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cfg.DebugEn = CVA6Cfg.DebugEn;
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cfg.NonIdemPotenceEn = (CVA6Cfg.NrNonIdempotentRules > 0) && (CVA6Cfg.NonIdempotentLength > 0);
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cfg.AxiBurstWriteEn = CVA6Cfg.AxiBurstWriteEn;
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cfg.ICACHE_SET_ASSOC = CVA6Cfg.IcacheSetAssoc;
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cfg.ICACHE_SET_ASSOC_WIDTH = $clog2(CVA6Cfg.IcacheSetAssoc);
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cfg.ICACHE_INDEX_WIDTH = ICACHE_INDEX_WIDTH;
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cfg.ICACHE_TAG_WIDTH = cfg.PLEN - ICACHE_INDEX_WIDTH;
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cfg.ICACHE_LINE_WIDTH = CVA6Cfg.IcacheLineWidth;
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cfg.ICACHE_USER_LINE_WIDTH = (CVA6Cfg.AxiUserWidth == 1) ? 4 : CVA6Cfg.IcacheLineWidth;
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cfg.DCacheType = CVA6Cfg.DCacheType;
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cfg.DcacheIdWidth = CVA6Cfg.DcacheIdWidth;
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cfg.DCACHE_SET_ASSOC = CVA6Cfg.DcacheSetAssoc;
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cfg.DCACHE_SET_ASSOC_WIDTH = $clog2(CVA6Cfg.DcacheSetAssoc);
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cfg.DCACHE_INDEX_WIDTH = DCACHE_INDEX_WIDTH;
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cfg.DCACHE_TAG_WIDTH = cfg.PLEN - DCACHE_INDEX_WIDTH;
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cfg.DCACHE_LINE_WIDTH = CVA6Cfg.DcacheLineWidth;
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cfg.DCACHE_USER_LINE_WIDTH = (CVA6Cfg.AxiUserWidth == 1) ? 4 : CVA6Cfg.DcacheLineWidth;
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cfg.DCACHE_USER_WIDTH = CVA6Cfg.AxiUserWidth;
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cfg.DCACHE_OFFSET_WIDTH = DCACHE_OFFSET_WIDTH;
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cfg.DCACHE_NUM_WORDS = 2 ** (DCACHE_INDEX_WIDTH - DCACHE_OFFSET_WIDTH);
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cfg.DCACHE_MAX_TX = unsigned'(2 ** CVA6Cfg.MemTidWidth);
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cfg.DATA_USER_EN = CVA6Cfg.DataUserEn;
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cfg.WtDcacheWbufDepth = CVA6Cfg.WtDcacheWbufDepth;
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cfg.FETCH_USER_WIDTH = CVA6Cfg.FetchUserWidth;
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cfg.FETCH_USER_EN = CVA6Cfg.FetchUserEn;
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cfg.AXI_USER_EN = CVA6Cfg.DataUserEn | CVA6Cfg.FetchUserEn;
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cfg.FETCH_WIDTH = 32 << ariane_pkg::SUPERSCALAR;
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cfg.FETCH_ALIGN_BITS = $clog2(cfg.FETCH_WIDTH / 8);
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cfg.INSTR_PER_FETCH = cfg.FETCH_WIDTH / (CVA6Cfg.RVC ? 16 : 32);
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cfg.LOG2_INSTR_PER_FETCH = cfg.INSTR_PER_FETCH > 1 ? $clog2(cfg.INSTR_PER_FETCH) : 1;
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cfg.ModeW = (CVA6Cfg.XLEN == 32) ? 1 : 4;
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cfg.ASIDW = (CVA6Cfg.XLEN == 32) ? 9 : 16;
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cfg.VMIDW = (CVA6Cfg.XLEN == 32) ? 7 : 14;
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cfg.PPNW = (CVA6Cfg.XLEN == 32) ? 22 : 44;
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cfg.GPPNW = (CVA6Cfg.XLEN == 32) ? 22 : 29;
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cfg.MODE_SV = (CVA6Cfg.XLEN == 32) ? config_pkg::ModeSv32 : config_pkg::ModeSv39;
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cfg.SV = (cfg.MODE_SV == config_pkg::ModeSv32) ? 32 : 39;
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cfg.SVX = (cfg.MODE_SV == config_pkg::ModeSv32) ? 34 : 41;
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cfg.InstrTlbEntries = CVA6Cfg.InstrTlbEntries;
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cfg.DataTlbEntries = CVA6Cfg.DataTlbEntries;
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cfg.UseSharedTlb = CVA6Cfg.UseSharedTlb;
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cfg.SharedTlbDepth = CVA6Cfg.SharedTlbDepth;
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cfg.VpnLen = VpnLen;
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cfg.PtLevels = PtLevels;
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return cfg;
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endfunction
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endpackage
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