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Mike Thompson e4bb1ac2a4 Fix copyright year
2023-03-29 13:33:59 -04:00
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bsp README cleanup 2021-12-02 08:49:26 -05:00
docs/VerifPlans copy from 40x, step 1 2022-02-24 11:32:08 +01:00
env copy from 40x, step 1 2022-02-24 11:32:08 +01:00
regress uncomment temporarily disabled tests in 40x rel_check 2022-02-04 16:19:44 +01:00
sim Updated rtl hash 2022-02-15 10:00:37 +01:00
tb copy from 40x, step 1 2022-02-24 11:32:08 +01:00
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README.md Merge branch 'cv32e40x/release' of https://github.com/openhwgroup/core-v-verif into silabs-robin/pr/master_merge_220118_40p_40x 2022-01-18 14:03:42 +01:00

README.md

CV32E40X: Verification Environment for the CV32E40X CORE-V processor core.

Directories:

  • bsp: the "board support package" for test-programs compiled/assembled/linked for the CV32E40X. This BSP is used by both the core testbench and the uvmt UVM verification environment.
  • env: the UVM environment class and its associated infrastrucutre.
  • sim: directory where you run the simulations.
  • tb: the Testbench module that instanitates the core.
  • tests: this is where all the testcases are.

There are README files in each directory with additional information.