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https://github.com/openhwgroup/cva6.git
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165 lines
7.6 KiB
Python
165 lines
7.6 KiB
Python
#!/usr/bin/env python3
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# Copyright 2022 Thales DIS design services SAS
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#
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# Licensed under the Solderpad Hardware Licence, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.0
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# You may obtain a copy of the License at https://solderpad.org/licenses/
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#
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# Original Author: Guillaume Chauvon (guillaume.chauvon@thalesgroup.com)
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import sys
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import os
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import argparse
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import re
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def setup_parser_config_generator():
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parser = argparse.ArgumentParser()
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parser.add_argument("--default_config", type=str, default="cv64a6_imafdc_sv39", required=True,
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choices=["cv32a6_imac_sv0","cv32a6_imac_sv32","cv32a6_imafc_sv32","cv64a6_imafdc_sv39","cv32a60x"],
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help="Default configuration is one of the 4 preexisting configuration: \
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cv32a6_imac_sv0, cv32a6_imac_sv32, cv32a6_imafc_sv32, cv64a6_imafdc_sv39")
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parser.add_argument("--isa", type=str, default=None, required=True,
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help="RISC-V ISA subset")
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parser.add_argument("--fpu", type=int, default=None, choices=[0,1],
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help="FPU enable ? 1 : enable, 0 : disable")
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parser.add_argument("--F16En", type=int, default=None, choices=[0,1],
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help="F16En enable ? 1 : enable, 0 : disable")
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parser.add_argument("--F16AltEn", type=int, default=None, choices=[0,1],
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help="F16AltEn enable ? 1 : enable, 0 : disable")
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parser.add_argument("--F8En", type=int, default=None, choices=[0,1],
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help="F8En enable ? 1 : enable, 0 : disable")
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parser.add_argument("--FVecEn", type=int, default=None, choices=[0,1],
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help="FVecEn enable ? 1 : enable, 0 : disable")
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parser.add_argument("--cvxif", type=int, default=None, choices=[0,1],
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help="CoreV-X-Interface enable ? 1 : enable, 0 : disable")
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parser.add_argument("--c_ext", type=int, default=None, choices=[0,1],
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help="C extension enable ? 1 : enable, 0 : disable")
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parser.add_argument("--a_ext", type=int, default=None, choices=[0,1],
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help="A extension enable ? 1 : enable, 0 : disable")
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parser.add_argument("--iuser_en", type=int, default=None, choices=[0,1],
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help="Fetch User enable ? 1 : enable, 0 : disable")
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parser.add_argument("--iuser_w", type=int, default=None, choices=list(range(1,64)),
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help="Fetch User Width ? [1-64]")
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parser.add_argument("--duser_en", type=int, default=None, choices=[0,1],
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help="Data User enable ? 1 : enable, 0 : disable")
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parser.add_argument("--duser_w", type=int, default=None, choices=list(range(1,64)),
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help="Data User Width ? [1-64]")
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parser.add_argument("--RenameEn", type=int, default=None, choices=[0,1],
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help="RenameEn ? 1 : enable, 0 : disable")
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parser.add_argument("--IcacheSetAssoc", type=int, default=None,
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help="Instruction cache associativity")
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parser.add_argument("--DcacheSetAssoc", type=int, default=None,
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help="Data cache associativity")
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parser.add_argument("--NrCommitPorts", type=int, default=None, choices=[1,2],
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help="Number of commit ports")
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parser.add_argument("--NrScoreboardEntries", type=int, default=None,
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help="Number of scoreboard entries")
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parser.add_argument("--FPGAEn", type=int, default=None, choices=[0,1],
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help="Use FPGA-specific hardware")
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parser.add_argument("--NrLoadPipeRegs", type=int, default=None,
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help="Load latency")
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parser.add_argument("--NrStorePipeRegs", type=int, default=None,
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help="Store latency")
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parser.add_argument("--InstrTlbEntries", type=int, default=None,
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help="Number of instruction TLB entries")
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parser.add_argument("--DataTlbEntries", type=int, default=None,
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help="Number of data TLB entries")
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parser.add_argument("--RASDepth", type=int, default=None,
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help="Depth of Return Address Stack")
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parser.add_argument("--BTBEntries", type=int, default=None,
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help="Number of Branch Target Buffer entries")
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parser.add_argument("--BHTEntries", type=int, default=None,
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help="Number of Branch History Table entries")
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return parser
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ISA = ""
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MABI = ""
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Config = dict()
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MapArgsToParameter={
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"xlen" : "CVA6ConfigXlen",
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"fpu" : "CVA6ConfigFpuEn",
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"F16En" : "CVA6ConfigF16En",
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"F16AltEn" : "CVA6ConfigF16AltEn",
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"F8En" : "CVA6ConfigF8En",
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"FVecEn" : "CVA6ConfigFVecEn",
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"cvxif" : "CVA6ConfigCvxifEn",
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"c_ext" : "CVA6ConfigCExtEn",
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"a_ext" : "CVA6ConfigAExtEn",
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"iuser_en" : "CVA6ConfigFetchUserEn",
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"iuser_w" : "CVA6ConfigFetchUserWidth",
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"duser_en" : "CVA6ConfigDataUserEn",
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"duser_w" : "CVA6ConfigDataUserWidth",
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"RenameEn" : "CVA6ConfigRenameEn",
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"IcacheSetAssoc" : "CVA6ConfigIcacheSetAssoc",
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"DcacheSetAssoc" : "CVA6ConfigDcacheSetAssoc",
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"NrCommitPorts" : "CVA6ConfigNrCommitPorts",
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"NrScoreboardEntries" : "CVA6ConfigNrScoreboardEntries",
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"FPGAEn" : "CVA6ConfigFPGAEn",
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"NrLoadPipeRegs" : "CVA6ConfigNrLoadPipeRegs",
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"NrStorePipeRegs" : "CVA6ConfigNrStorePipeRegs",
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"InstrTlbEntries" : "CVA6ConfigInstrTlbEntries",
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"DataTlbEntries" : "CVA6ConfigDataTlbEntries",
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"RASDepth": "CVA6ConfigRASDepth",
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"BTBEntries": "CVA6ConfigBTBEntries",
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"BHTEntries": "CVA6ConfigBHTEntries",
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}
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MapParametersToArgs = {i:k for k, i in MapArgsToParameter.items()} #reverse map
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def generate_config(argv):
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parser = setup_parser_config_generator()
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args = parser.parse_args(argv)
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Args = vars(args) # give a dictionary of args
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print("\n[Generating configuration ... ]")
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print("Default configuration is "+Args['default_config'])
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print("Make sure to compile your code with this ISA :", Args["isa"], "!")
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ISA = Args["isa"]
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if "cv32" in Args['default_config']:
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gen = "gen32"
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Args['xlen'] = 32
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MABI = "ilp32"
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else:
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gen = "gen64"
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Args['xlen'] = 64
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MABI = "lp64"
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# Read file
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alllines = []
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with open("core/include/" + Args['default_config'] + "_config_pkg.sv", "r") as in_f:
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alllines = in_f.readlines()
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# Apply cmdline args to override individual localparam values.
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for name, value in Args.items():
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if name not in ['default_config', 'isa', 'xlen'] and value is not None:
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param = MapArgsToParameter[name]
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print("setting", name, "to", value)
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for i, line in enumerate(alllines):
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alllines[i] = re.sub(r"^(\s*localparam\s+"+param+r"\s*=\s*)(.*)(;\s*)$", r"\g<1>"+str(value)+r"\g<3>", line)
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# Build Config and warn about localparams which have no matching cmdline option associated with them.
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for line in alllines:
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linematch = re.match(r"^(\s*localparam\s+CVA6Config(?P<param>\w*)\s*=\s*)(?P<value>.*)(;\s*)$", line)
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if linematch:
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param = 'CVA6Config'+linematch.group('param')
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value = linematch.group('value')
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if linematch:
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try:
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arg = MapParametersToArgs[param]
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Config[arg] = Config['xlen'] if value == "CVA6ConfigXlen" else int(value)
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except KeyError:
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print(f"WARNING: CVA6 configuration parameter '{param}' not supported yet via cmdline args,",
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"\n\t consider extending script 'config_pkg_generator.py'!")
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# Write new file
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with open("core/include/"+gen+"_config_pkg.sv", "w") as out_f:
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out_f.writelines(alllines)
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print("[Generating configuration Done]")
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return [ISA, MABI, gen, Config] # return ISA, MABI, gen (for testharness), Config for cva6.py in core-v-verif
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if __name__ == "__main__":
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generate_config(sys.argv[1:])
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