cva6/tb/common
Florian Zaruba a5f3184a65 Improve Tandem Simulation, switch-able caches and fix a cache-bug (#192)
* Add spike isa sim

* Fix AMO problem in verilator

* 🎨 Tidy up FPU wrapper

* Bump axi_exclusive submodule

* Refactor serpent AXI adapter, bump dbg and atomics submodules, add separate bootrom for linux on OpenPiton (#190)

* Refactor serpent AXI adapter

* Disable FPU in OpenPiton by default

* Bump dbg and atomics submodules

* Fix cache testbenches (interface change)

* FPGA bootrom changes for OpenPiton SDHC

* Introduce two bootroms, one for baremetal apps (pitonstream), and one for linux boot from SD

* Testing barrier-based synchronisation instead of CLINT-based

* This bootrom works for 2 core on g2 and if you change MAX_HARTS to 4, then 4 cores on vc707

* Add MAX_HARTS switch to makefile

* Fix gitlab CI

* Revert standard FPGA bootrom

* Update Flist

* Make UART_FREQ a parameter

* Fix typo in tb.list and an error in define switch in ariane_pkg

* Copy over SD-driver in bootloader from @leon575777642

* Fix compilation issues of bootrom

* Change signal name in serpent periph portlist

* Correct generate statement in serpent dcache memory

* Add Piton SD Controller, FPGA fixes

* Fix race condition in dcache misshandler

* Add tandem spike to Make flow

* Remove OpenPiton SD Card controller again
2019-03-18 11:51:58 +01:00
..
core_mem.sv Implemented and tested new icache for openpiton. 2018-09-06 13:33:37 +02:00
dp_ram.sv Implemented and tested new icache for openpiton. 2018-09-06 13:33:37 +02:00
mock_uart.sv Improve Spike alignment 2018-11-05 01:24:10 +01:00
SimDTM.sv 🎨 Flatten tb submodule 2018-08-01 01:39:01 +02:00
SimJTAG.sv 🎨 Flatten tb submodule 2018-08-01 01:39:01 +02:00
spike.sv Improve Tandem Simulation, switch-able caches and fix a cache-bug (#192) 2019-03-18 11:51:58 +01:00
string_buffer.svh Implemented and tested new icache for openpiton. 2018-09-06 13:33:37 +02:00
tb.svh License headers updated, some indentation cleanup, consolidate common tb.svh file. 2018-11-26 13:20:19 +01:00
uart.sv Merge remote-tracking branch 'origin/ariane_next' into fpga_dev 2018-11-17 22:38:54 +01:00