mirror of
https://github.com/openhwgroup/cva6.git
synced 2025-04-19 19:57:11 -04:00
b3ae6e9362
* Revert "fix vcs simulation errors regarding hypervisor extension code (#1889)" This reverts commit5ff5f164fb. * Revert "Mmu user manual (#1881)" This reverts commit6a5863e71a. * Revert "Mmu unify pr (#1876)" This reverts commit9fb5db2555.
273 lines
11 KiB
YAML
273 lines
11 KiB
YAML
package:
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name: ariane
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authors:
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- "Florian Zaruba <zarubaf@iis.ee.ethz.ch>"
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- "Michael Schaffner <schaffner@iis.ee.ethz.ch>"
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- "Andreas Kuster <kustera@ethz.ch>"
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# WT_DCACHE
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dependencies:
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axi: { git: "https://github.com/pulp-platform/axi.git", version: 0.31.0 }
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common_cells:
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{ git: "https://github.com/pulp-platform/common_cells", version: 1.23.0 }
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fpnew: { git: "https://github.com/openhwgroup/cvfpu.git", version: 0.7.0 }
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tech_cells_generic:
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{ git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.13 }
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frozen: true
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sources:
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- files:
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- core/include/config_pkg.sv
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- target: cv64a6_imafdcv_sv39
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files:
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- core/include/cv64a6_imafdcv_sv39_config_pkg.sv
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- core/include/riscv_pkg.sv
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- core/include/ariane_pkg.sv
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- core/mmu_sv39/tlb.sv
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- core/mmu_sv39/mmu.sv
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- core/mmu_sv39/ptw.sv
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- corev_apu/tb/common/mock_uart.sv
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- target: cv64a6_imafdc_sv39
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files:
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- core/include/cv64a6_imafdc_sv39_config_pkg.sv
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- core/include/riscv_pkg.sv
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- core/include/ariane_pkg.sv
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- core/mmu_sv39/tlb.sv
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- core/mmu_sv39/mmu.sv
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- core/mmu_sv39/ptw.sv
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- core/cva6_accel_first_pass_decoder_stub.sv
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- target: cv64a6_imafdc_sv39_wb
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files:
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- core/include/cv64a6_imafdc_sv39_wb_config_pkg.sv
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- core/include/riscv_pkg.sv
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- core/include/ariane_pkg.sv
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- core/mmu_sv39/tlb.sv
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- core/mmu_sv39/mmu.sv
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- core/mmu_sv39/ptw.sv
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- core/cva6_accel_first_pass_decoder_stub.sv
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- target: cv32a6_imac_sv0
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files:
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- core/include/cv32a6_imac_sv0_config_pkg.sv
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- core/include/riscv_pkg.sv
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- core/include/ariane_pkg.sv
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- core/mmu_sv32/cva6_tlb_sv32.sv
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- core/mmu_sv32/cva6_mmu_sv32.sv
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- core/mmu_sv32/cva6_ptw_sv32.sv
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- core/cva6_accel_first_pass_decoder_stub.sv
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- target: cv32a6_imac_sv32
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files:
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- core/include/cv32a6_imac_sv32_config_pkg.sv
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- core/include/riscv_pkg.sv
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- core/include/ariane_pkg.sv
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- core/mmu_sv32/cva6_tlb_sv32.sv
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- core/mmu_sv32/cva6_mmu_sv32.sv
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- core/mmu_sv32/cva6_ptw_sv32.sv
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- core/cva6_accel_first_pass_decoder_stub.sv
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- target: cv32a6_imafc_sv32
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files:
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- core/include/cv32a6_imafc_sv32_config_pkg.sv
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- core/include/riscv_pkg.sv
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- core/include/ariane_pkg.sv
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- core/mmu_sv32/cva6_tlb_sv32.sv
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- core/mmu_sv32/cva6_mmu_sv32.sv
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- core/mmu_sv32/cva6_ptw_sv32.sv
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- core/cva6_accel_first_pass_decoder_stub.sv
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# included via target core/include/${TARGET_CFG}_config_pkg.sv
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# ariane_axi_pkg is dependent on this.
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# - vendor/pulp-platform/axi/src/axi_pkg.sv
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# Packages
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- core/include/wt_cache_pkg.sv
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- core/include/std_cache_pkg.sv
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- core/include/acc_pkg.sv
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# for all the below files use Flist.cva6 as baseline and also look at Makefile pd/synth
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# CVXIF
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- core/include/instr_tracer_pkg.sv
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- core/include/cvxif_pkg.sv
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- core/cvxif_example/include/cvxif_instr_pkg.sv
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- core/cvxif_fu.sv
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- core/cvxif_example/cvxif_example_coprocessor.sv
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- core/cvxif_example/instr_decoder.sv
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# vendored deps
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# - include_dirs: [vendor/pulp-platform/common_cells/include/, vendor/pulp-platform/common_cells/src/]
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# files:
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# - vendor/pulp-platform/common_cells/src/cf_math_pkg.sv
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# - vendor/pulp-platform/common_cells/src/fifo_v3.sv
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# - vendor/pulp-platform/common_cells/src/lfsr.sv
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# - vendor/pulp-platform/common_cells/src/lzc.sv
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# - vendor/pulp-platform/common_cells/src/rr_arb_tree.sv
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# - vendor/pulp-platform/common_cells/src/shift_reg.sv
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# - vendor/pulp-platform/common_cells/src/unread.sv
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# - vendor/pulp-platform/common_cells/src/popcount.sv
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# - vendor/pulp-platform/common_cells/src/exp_backoff.sv
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# # Common Cells for example coprocessor
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# - vendor/pulp-platform/common_cells/src/counter.sv
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# - vendor/pulp-platform/common_cells/src/delta_counter.sv
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# Floating point unit
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# - vendor/openhwgroup/cvfpu/src/fpnew_pkg.sv
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# - vendor/openhwgroup/cvfpu/src/fpnew_cast_multi.sv
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# - vendor/openhwgroup/cvfpu/src/fpnew_classifier.sv
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# - vendor/openhwgroup/cvfpu/src/fpnew_divsqrt_multi.sv
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# - vendor/openhwgroup/cvfpu/src/fpnew_fma_multi.sv
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# - vendor/openhwgroup/cvfpu/src/fpnew_fma.sv
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# - vendor/openhwgroup/cvfpu/src/fpnew_noncomp.sv
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# - vendor/openhwgroup/cvfpu/src/fpnew_opgroup_block.sv
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# - vendor/openhwgroup/cvfpu/src/fpnew_opgroup_fmt_slice.sv
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# - vendor/openhwgroup/cvfpu/src/fpnew_opgroup_multifmt_slice.sv
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# - vendor/openhwgroup/cvfpu/src/fpnew_rounding.sv
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# - vendor/openhwgroup/cvfpu/src/fpnew_top.sv
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# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/defs_div_sqrt_mvp.sv
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# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/control_mvp.sv
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# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/div_sqrt_top_mvp.sv
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# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/iteration_div_sqrt_mvp.sv
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# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/norm_div_sqrt_mvp.sv
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# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/nrbd_nrsc_mvp.sv
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# - vendor/openhwgroup/cvfpu/src/fpu_div_sqrt_mvp/hdl/preprocess_mvp.sv
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# Top-level source files (not necessarily instantiated at the top of the cva6).
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- core/cva6.sv
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- core/alu.sv
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# Note: depends on fpnew_pkg, above
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- core/fpu_wrap.sv
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- core/branch_unit.sv
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- core/compressed_decoder.sv
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- core/controller.sv
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- core/csr_buffer.sv
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- core/csr_regfile.sv
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- core/decoder.sv
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- core/ex_stage.sv
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- core/instr_realign.sv
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- core/id_stage.sv
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- core/issue_read_operands.sv
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- core/issue_stage.sv
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- core/load_unit.sv
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- core/load_store_unit.sv
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- core/lsu_bypass.sv
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- core/mult.sv
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- core/multiplier.sv
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- core/serdiv.sv
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- core/perf_counters.sv
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- core/ariane_regfile_ff.sv
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- core/ariane_regfile_fpga.sv
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# NOTE: scoreboard.sv modified for DSIM (unchanged for other simulators)
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- core/scoreboard.sv
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- core/store_buffer.sv
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- core/amo_buffer.sv
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- core/store_unit.sv
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- core/commit_stage.sv
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- core/axi_shim.sv
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# What is "frontend"?
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- core/frontend/btb.sv
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- core/frontend/bht.sv
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- core/frontend/ras.sv
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- core/frontend/instr_scan.sv
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- core/frontend/instr_queue.sv
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- core/frontend/frontend.sv
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# Cache subsystem
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- core/cache_subsystem/wt_dcache_ctrl.sv
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- core/cache_subsystem/wt_dcache_mem.sv
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- core/cache_subsystem/wt_dcache_missunit.sv
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- core/cache_subsystem/wt_dcache_wbuffer.sv
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- core/cache_subsystem/wt_dcache.sv
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- core/cache_subsystem/cva6_icache.sv
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- core/cache_subsystem/wt_cache_subsystem.sv
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- core/cache_subsystem/wt_axi_adapter.sv
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- core/cache_subsystem/tag_cmp.sv
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- core/cache_subsystem/cva6_icache_axi_wrapper.sv
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- core/cache_subsystem/axi_adapter.sv
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- core/cache_subsystem/miss_handler.sv
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- core/cache_subsystem/cache_ctrl.sv
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- core/cache_subsystem/std_nbdcache.sv
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- core/cache_subsystem/std_cache_subsystem.sv
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# Physical Memory Protection
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# NOTE: pmp.sv modified for DSIM (unchanged for other simulators)
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- core/pmp/src/pmp.sv
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- core/pmp/src/pmp_entry.sv
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- include_dirs:
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- common/local/util
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files:
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- common/local/util/sram.sv
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- target: not(all(fpga, xilinx))
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include_dirs:
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- common/local/util
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files:
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- common/local/util/tc_sram_wrapper.sv
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# - vendor/pulp-platform/tech_cells_generic/src/rtl/tc_sram.sv
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- target: all(fpga, xilinx)
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include_dirs:
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- common/local/util
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files:
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- common/local/util/tc_sram_fpga_wrapper.sv
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- target: not(synthesis)
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include_dirs:
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- core/include
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- common/local/util
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files:
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# Tracer (behavioral code, not RTL)
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- core/include/instr_tracer_pkg.sv
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- common/local/util/instr_tracer.sv
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- common/local/util/instr_tracer_if.sv
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# TODO target define FPGA target + verification etc
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# - target: test
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# files:
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# - corev_apu/riscv-dbg/src/dm_pkg.sv
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# - corev_apu/tb/ariane_soc_pkg.sv
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# - corev_apu/tb/ariane_axi_soc_pkg.sv
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# - corev_apu/tb/ariane_testharness.sv
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# - corev_apu/tb/ariane_peripherals.sv
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# - corev_apu/tb/common/uart.sv
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# - corev_apu/tb/common/SimDTM.sv
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# - corev_apu/tb/common/SimJTAG.sv
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# - target: all(fpga, xilinx)
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# files:
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# - corev_apu/fpga/src/ariane_peripherals_xilinx.sv
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# - corev_apu/fpga/src/ariane_xilinx.sv
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# - corev_apu/fpga/src/fan_ctrl.sv
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# - corev_apu/fpga/src/bootrom/bootrom.sv
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# - corev_apu/fpga/src/ariane-ethernet/ssio_ddr_in.sv
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# - corev_apu/fpga/src/ariane-ethernet/rgmii_soc.sv
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# - corev_apu/fpga/src/ariane-ethernet/axis_gmii_rx.sv
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# - corev_apu/fpga/src/ariane-ethernet/oddr.sv
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# - corev_apu/fpga/src/ariane-ethernet/axis_gmii_tx.sv
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# - corev_apu/fpga/src/ariane-ethernet/dualmem_widen8.sv
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# - corev_apu/fpga/src/ariane-ethernet/rgmii_phy_if.sv
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# - corev_apu/fpga/src/ariane-ethernet/dualmem_widen.sv
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# - corev_apu/fpga/src/ariane-ethernet/rgmii_lfsr.sv
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# - corev_apu/fpga/src/ariane-ethernet/rgmii_core.sv
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# - corev_apu/fpga/src/ariane-ethernet/eth_mac_1g.sv
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# - corev_apu/fpga/src/ariane-ethernet/eth_mac_1g_rgmii.sv
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# - corev_apu/fpga/src/ariane-ethernet/eth_mac_1g_rgmii_fifo.sv
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# - corev_apu/fpga/src/ariane-ethernet/iddr.sv
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# - corev_apu/fpga/src/ariane-ethernet/framing_top.sv
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# - corev_apu/fpga/src/apb_uart/src/apb_uart.vhd
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# - corev_apu/fpga/src/apb_uart/src/uart_transmitter.vhd
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# - corev_apu/fpga/src/apb_uart/src/uart_interrupt.vhd
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# - corev_apu/fpga/src/apb_uart/src/slib_mv_filter.vhd
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# - corev_apu/fpga/src/apb_uart/src/slib_input_filter.vhd
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# - corev_apu/fpga/src/apb_uart/src/slib_counter.vhd
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# - corev_apu/fpga/src/apb_uart/src/uart_receiver.vhd
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# - corev_apu/fpga/src/apb_uart/src/slib_input_sync.vhd
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# - corev_apu/fpga/src/apb_uart/src/slib_edge_detect.vhd
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# - corev_apu/fpga/src/apb_uart/src/slib_clock_div.vhd
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# - corev_apu/fpga/src/apb_uart/src/slib_fifo.vhd
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# - corev_apu/fpga/src/apb_uart/src/uart_baudgen.vhd
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